[llvm-branch-commits] [llvm] DAG: Handle load in SimplifyDemandedVectorElts (PR #122671)

[Simon Pilgrim via llvm-branch-commits]

RKSimon wrote:

X86TargetLowering::shouldReduceLoadWidth is a mess, resulting in a lot of duplicate aliasaed loads that make very little sense - we're seeing something similar on #122485, but it might take some time to unravel.

https://github.com/llvm/llvm-project/pull/122671