[llvm-branch-commits] [llvm] [AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores. (PR #121185)

[David Green via llvm-branch-commits]

https://github.com/davemgreen approved this pull request.

I think this sounds OK. LGTM

(Which of bitcast or load/store is considered the most fundamental for v4i1/v8i1? I think I would have expected in GISel the loads to be converted to a i4/i8 load with bitcast, and the bitcast legalizes however it does. It could obviously go the other way where a bitcast is just legalized to load+store. I wasn't sure why the v4i1 load needed to produce an extending load just just to scalarize again, but perhaps it is necessary to get past legalization successfully, I haven't looked a lot into it lately. )

https://github.com/llvm/llvm-project/pull/121185