[llvm-branch-commits] [llvm] AMDGPU/GlobalISel: Temporal divergence lowering (non i1) (PR #124298)

[Nicolai Hähnle via llvm-branch-commits]

nhaehnle wrote:

How about this comment from earlier:

> Every Inst may potentially appear with many UseInsts in the temporal divergence list. The current code will create multiple new registers and multiple COPY instructions, which seems wasteful even if downstream passes can often clean it up.
>
> I would suggest capturing the created register in a DenseMap<Instruction *, Register> for re-use.
>
> Also, how about inserting the COPY at the end of Inst->getParent()? That way, the live range of the VGPR is reduced.

?

https://github.com/llvm/llvm-project/pull/124298