[llvm-branch-commits] [llvm] [AMDGPU] Respect MBB alignment in the getFunctionCodeSize() (PR #127142)

[Eli Friedman via llvm-branch-commits]

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@@ -212,6 +212,8 @@ uint64_t SIProgramInfo::getFunctionCodeSize(const MachineFunction &MF) {
   uint64_t CodeSize = 0;
 
   for (const MachineBasicBlock &MBB : MF) {
+    CodeSize = alignTo(CodeSize, MBB.getAlignment());
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efriedma-quic wrote:

This is not the right way to do this kind of math; you don't know how much padding the assembler is actually going to insert.  Use a conservative estimate like `CodeSize += MBB.getAlignment() - 1`.  See https://reviews.llvm.org/D150009 for further discussion.

https://github.com/llvm/llvm-project/pull/127142