[llvm-branch-commits] [SPARC][IAS] Add support for `setsw` pseudoinstruction (PR #125150)

[Sergei Barannikov via llvm-branch-commits]

================
@@ -734,6 +737,69 @@ bool SparcAsmParser::expandSET(MCInst &Inst, SMLoc IDLoc,
   return false;
 }
 
+bool SparcAsmParser::expandSETSW(MCInst &Inst, SMLoc IDLoc,
+                                 SmallVectorImpl<MCInst> &Instructions) {
+  MCOperand MCRegOp = Inst.getOperand(0);
+  MCOperand MCValOp = Inst.getOperand(1);
+  assert(MCRegOp.isReg());
+  assert(MCValOp.isImm() || MCValOp.isExpr());
+
+  // the imm operand can be either an expression or an immediate.
----------------
s-barannikov wrote:

```suggestion
  // The imm operand can be either an expression or an immediate.
```

https://github.com/llvm/llvm-project/pull/125150