[llvm-branch-commits] [llvm] [AMDGPU] Limit allocation of lo128 registers for occupancy (PR #173100)

[Stanislav Mekhanoshin via llvm-branch-commits]

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@@ -639,8 +639,20 @@ def VGPR_32_Lo128 : SIRegisterClass<"AMDGPU", !listconcat(Reg32Types.types, Reg1
   let AltOrders = [(add (sequence "VGPR%u", 0, 127),
                         (sequence "VGPR%u", 256, 383),
                         (sequence "VGPR%u", 512, 639),
-                        (sequence "VGPR%u", 768, 895))];
-  let AltOrderSelect = [{ return 1; }];
+                        (sequence "VGPR%u", 768, 895)),
+                   (add (sequence "VGPR%u", 0, 127),
+                        (sequence "VGPR%u", 256, 383),
+                        (sequence "VGPR%u", 512, 639)),
+                   (add (sequence "VGPR%u", 0, 127),
+                        (sequence "VGPR%u", 256, 383)),
+                   (add (sequence "VGPR%u", 0, 127))];
+  let AltOrderSelect = [{
+                          const GCNSubtarget &ST = MF.getSubtarget<GCNSubtarget>();
+                          unsigned N = ST.getMaxNumVGPRs(MF);
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rampitec wrote:

Do you mean this?
```
unsigned N = ST.getRegisterInfo()->getAllocatableSet(MF, &AMDGPU::VGPR_32RegClass).count();
```

https://github.com/llvm/llvm-project/pull/173100