[llvm-branch-commits] [lldb] [lldb][RISCV] update RISCV target features in expressions (PR #173048)

via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Fri Dec 19 08:48:24 PST 2025


https://github.com/daniilavdeev created https://github.com/llvm/llvm-project/pull/173048

This patch updates CompilerInstance initialization to use SubtargetFeatures from ArchSpec.

>From 99175546d470d11c2841c408ddc3f86957a0159c Mon Sep 17 00:00:00 2001
From: Daniil Avdeev <daniilavdeev237 at gmail.com>
Date: Fri, 19 Dec 2025 11:08:55 +0000
Subject: [PATCH] [lldb][RISCV] update RISCV target features in expressions

This patch updates CompilerInstance initialization to use
SubtargetFeatures from ArchSpec.
---
 .../ExpressionParser/Clang/ClangExpressionParser.cpp        | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp b/lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
index eb47082a70552..3cce39fc81b6a 100644
--- a/lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
+++ b/lldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
@@ -499,6 +499,12 @@ static void SetupTargetOpts(CompilerInstance &compiler,
     compiler.getTargetOpts().FeaturesAsWritten.push_back("+sse2");
   }
 
+  if (target_machine == llvm::Triple::riscv32 ||
+      target_machine == llvm::Triple::riscv64) {
+    llvm::copy(target_arch.GetSubtargetFeatures().getFeatures(),
+               std::back_inserter(compiler.getTargetOpts().FeaturesAsWritten));
+  }
+
   // Set the target CPU to generate code for. This will be empty for any CPU
   // that doesn't really need to make a special
   // CPU string.



More information about the llvm-branch-commits mailing list