[llvm-branch-commits] [llvm] [RISCV] Schedule RVV instructions with compatible type first (PR #95924)

[Pengcheng Wang via llvm-branch-commits]

wangpc-pp wrote:

The current result on llvm-testsuite of this approach(compiled with `-O3 -march=rva23u64 -mrvv-vector-bits=128`, `-mrvv-vector-bits` is specified to increase the opportunities of vectorization):
```
Metric: riscv-insert-vsetvli.NumInsertedVSETVL,riscv-instr-info.NumVRegSpilled,riscv-instr-info.NumVRegReloaded

Program                                       riscv-insert-vsetvli.NumInsertedVSETVL                    riscv-instr-info.NumVRegSpilled                   riscv-instr-info.NumVRegReloaded                  
                                              baseline                               vtype-sched diff   baseline                        vtype-sched diff  baseline                         vtype-sched diff 
SingleSource/Benchmarks/Stanford/Queens         26.00                                  17.00     -34.6%    12.00                           12.00     0.0%    12.00                            12.00     0.0%
SingleSource/Benchmarks/Stanford/Oscar          12.00                                  10.00     -16.7%                                                                                                     
MultiSourc...arks/Rodinia/backprop/backprop     14.00                                  12.00     -14.3%                                                                                                     
SingleSource/Benchmarks/Misc/flops-8             7.00                                   8.00      14.3%                                                                                                     
SingleSource/Benchmarks/Misc/flops-6             7.00                                   8.00      14.3%                                                                                                     
SingleSource/Benchmarks/Misc/flops-5             7.00                                   8.00      14.3%                                                                                                     
SingleSour.../floyd-warshall/floyd-warshall     32.00                                  36.00      12.5%                                                                                                     
MultiSourc...hmarks/MallocBench/cfrac/cfrac     33.00                                  29.00     -12.1%     5.00                            5.00     0.0%     5.00                             5.00     0.0%
SingleSour...ce/UnitTests/matrix-types-spec   2495.00                                2218.00     -11.1% 38865.00                        37481.00    -3.6% 58086.00                         57734.00    -0.6%
MultiSourc...ch/consumer-lame/consumer-lame    719.00                                 660.00      -8.2%    29.00                           29.00     0.0%    44.00                            44.00     0.0%
External/S...2017rate/525.x264_r/525.x264_r   1414.00                                1319.00      -6.7%   116.00                          111.00    -4.3%   128.00                           121.00    -5.5%
External/S...017speed/625.x264_s/625.x264_s   1414.00                                1319.00      -6.7%   116.00                          111.00    -4.3%   128.00                           121.00    -5.5%
MultiSource/Benchmarks/Ptrdist/bc/bc            17.00                                  18.00       5.9%                                                                                                     
MultiSource/Benchmarks/McCat/18-imp/imp         35.00                                  33.00      -5.7%                                                                                                     
External/S...T2017speed/605.mcf_s/605.mcf_s     70.00                                  66.00      -5.7%                                                                                                     
                           Geomean difference                                                     -0.5%                                             -0.9%                                              -1.1%
```

We have:
* `-0.5%` of `vsetvli`.
* `-0.9%` of vector spills.
* `-1.1%` of vector reloads.


https://github.com/llvm/llvm-project/pull/95924