[llvm-branch-commits] [llvm] [AMDGPU] Add structural stall heuristic to scheduling strategies (PR #169617)

[Jeffrey Byrnes via llvm-branch-commits]

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@@ -313,6 +313,10 @@ unsigned GCNHazardRecognizer::PreEmitNoops(MachineInstr *MI) {
   return std::max(W, NopPadding.getValue());
 }
 
+unsigned GCNHazardRecognizer::getHazardWaitStates(MachineInstr *MI) const {
+  return const_cast<GCNHazardRecognizer *>(this)->PreEmitNoopsCommon(MI);
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jrbyrnes wrote:

I'm seeing some logic in `checkSMRDHazards` that assumes physical registers, which is not valid PreRA.

https://github.com/llvm/llvm-project/pull/169617