[llvm-branch-commits] [NFC][ELF] Abstract RelrBaseSection more like RelocationBaseSection (PR #171178)

[via llvm-branch-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-lld

Author: Jessica Clarke (jrtc27)

<details>
<summary>Changes</summary>

This makes addRelativeReloc a bit more readable and uniform, as well as
the relrAuthDyn call in RelocScan::process.


---
Full diff: https://github.com/llvm/llvm-project/pull/171178.diff


2 Files Affected:

- (modified) lld/ELF/Relocations.cpp (+4-8) 
- (modified) lld/ELF/SyntheticSections.h (+23) 


``````````diff
diff --git a/lld/ELF/Relocations.cpp b/lld/ELF/Relocations.cpp
index 2f08181a4eb0c..e2f68e5688333 100644
--- a/lld/ELF/Relocations.cpp
+++ b/lld/ELF/Relocations.cpp
@@ -728,12 +728,8 @@ static void addRelativeReloc(Ctx &ctx, InputSectionBase &isec,
   // don't store the addend values, so we must write it to the relocated
   // address.
   if (part.relrDyn && isec.addralign >= 2 && offsetInSec % 2 == 0) {
-    isec.addReloc({expr, type, offsetInSec, addend, &sym});
-    if (shard)
-      part.relrDyn->relocsVec[parallel::getThreadIndex()].push_back(
-          {&isec, isec.relocs().size() - 1});
-    else
-      part.relrDyn->relocs.push_back({&isec, isec.relocs().size() - 1});
+    part.relrDyn->addRelativeReloc<shard>(isec, offsetInSec, sym, addend, type,
+                                          expr);
     return;
   }
   part.relaDyn->addRelativeReloc<shard>(ctx.target->relativeRel, isec,
@@ -1015,8 +1011,8 @@ void RelocScan::process(RelExpr expr, RelType type, uint64_t offset,
           // When symbol values are determined in
           // finalizeAddressDependentContent, some .relr.auth.dyn relocations
           // may be moved to .rela.dyn.
-          sec->addReloc({expr, type, offset, addend, &sym});
-          part.relrAuthDyn->relocs.push_back({sec, sec->relocs().size() - 1});
+          part.relrAuthDyn->addRelativeReloc(*sec, offset, sym, addend, type,
+                                             expr);
         } else {
           part.relaDyn->addReloc({R_AARCH64_AUTH_RELATIVE, sec, offset, false,
                                   sym, addend, R_ABS});
diff --git a/lld/ELF/SyntheticSections.h b/lld/ELF/SyntheticSections.h
index 79fa8140c2498..72711aa75aec9 100644
--- a/lld/ELF/SyntheticSections.h
+++ b/lld/ELF/SyntheticSections.h
@@ -592,15 +592,38 @@ struct RelativeReloc {
 class RelrBaseSection : public SyntheticSection {
 public:
   RelrBaseSection(Ctx &, unsigned concurrency, bool isAArch64Auth = false);
+  /// Add a dynamic relocation without writing an addend to the output section.
+  /// This overload can be used if the addends are written directly instead of
+  /// using relocations on the input section.
+  template <bool shard = false> void addReloc(const RelativeReloc &reloc) {
+    relocs.push_back(reloc);
+  }
+  /// Add a relative dynamic relocation that uses the target address of \p sym
+  /// (i.e. InputSection::getRelocTargetVA()) + \p addend as the addend.
+  template <bool shard = false>
+  void addRelativeReloc(InputSectionBase &isec, uint64_t offsetInSec,
+                        Symbol &sym, int64_t addend, RelType addendRelType,
+                        RelExpr expr) {
+    assert(expr != R_ADDEND && "expected non-addend relocation expression");
+    isec.addReloc({expr, addendRelType, offsetInSec, addend, &sym});
+    addReloc<shard>({&isec, isec.relocs().size() - 1});
+  }
   void mergeRels();
   bool isNeeded() const override {
     return !relocs.empty() ||
            llvm::any_of(relocsVec, [](auto &v) { return !v.empty(); });
   }
   SmallVector<RelativeReloc, 0> relocs;
+
+protected:
   SmallVector<SmallVector<RelativeReloc, 0>, 0> relocsVec;
 };
 
+template <>
+inline void RelrBaseSection::addReloc<true>(const RelativeReloc &reloc) {
+  relocsVec[llvm::parallel::getThreadIndex()].push_back(reloc);
+}
+
 // RelrSection is used to encode offsets for relative relocations.
 // Proposal for adding SHT_RELR sections to generic-abi is here:
 //   https://groups.google.com/forum/#!topic/generic-abi/bX460iggiKg

``````````

</details>


https://github.com/llvm/llvm-project/pull/171178