[llvm-branch-commits] [llvm] DAG: Avoid more uses of getLibcallName (PR #170402)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Dec 2 18:22:52 PST 2025
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/170402
None
>From 77249d0059b431c93dcb35424696f31b87ff635f Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Tue, 2 Dec 2025 20:41:15 -0500
Subject: [PATCH] DAG: Avoid more uses of getLibcallName
---
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 +-
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 70950084ee6b7..0e52f0516b09a 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -4983,7 +4983,7 @@ static bool isDivRemLibcallAvailable(SDNode *Node, bool isSigned,
case MVT::i128: LC= isSigned ? RTLIB::SDIVREM_I128:RTLIB::UDIVREM_I128; break;
}
- return TLI.getLibcallName(LC) != nullptr;
+ return TLI.getLibcallImpl(LC) != RTLIB::Unsupported;
}
/// Issue divrem if both quotient and remainder are needed.
diff --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 3564cbebed5c2..0ba8816bf1e82 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -11121,7 +11121,8 @@ void TargetLowering::forceExpandWideMUL(SelectionDAG &DAG, const SDLoc &dl,
else if (WideVT == MVT::i128)
LC = RTLIB::MUL_I128;
- if (LC == RTLIB::UNKNOWN_LIBCALL || !getLibcallName(LC)) {
+ RTLIB::LibcallImpl LibcallImpl = getLibcallImpl(LC);
+ if (LibcallImpl == RTLIB::Unsupported) {
forceExpandMultiply(DAG, dl, Signed, Lo, Hi, LHS, RHS);
return;
}
More information about the llvm-branch-commits
mailing list