[llvm-branch-commits] [llvm] AMDGPU: Remove special case of SGPR_LO class in imm folding (PR #155518)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Aug 26 16:28:12 PDT 2025
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/155518
Previous change accidentally broke this which shows it's not
doing anything.
>From 37c07a590ad6f82d15329729838a9d472d8f591a Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Wed, 27 Aug 2025 08:26:25 +0900
Subject: [PATCH] AMDGPU: Remove special case of SGPR_LO class in imm folding
Previous change accidentally broke this which shows it's not
doing anything.
---
llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 8 --------
1 file changed, 8 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
index e1bc6d0239111..3979e1e0c44aa 100644
--- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
+++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
@@ -1260,14 +1260,6 @@ void SIFoldOperandsImpl::foldOperand(
return;
const TargetRegisterClass *DestRC = TRI->getRegClassForReg(*MRI, DestReg);
- // Allow immediates COPYd into sgpr_lo16 to be further folded while
- // still being legal if not further folded
- if (DestRC == &AMDGPU::SGPR_LO16RegClass) {
- assert(ST->useRealTrue16Insts());
- MRI->setRegClass(DestReg, &AMDGPU::SGPR_32RegClass);
- DestRC = &AMDGPU::SGPR_32RegClass;
- }
-
// In order to fold immediates into copies, we need to change the copy to a
// MOV. Find a compatible mov instruction with the value.
for (unsigned MovOp :
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