[llvm-branch-commits] [llvm] 674e7a3 - Revert "[llvm-exegesis] Implement the loop repetition mode for AArch64 (#154751)"
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Tue Aug 26 07:24:12 PDT 2025
Author: Sjoerd Meijer
Date: 2025-08-26T15:24:10+01:00
New Revision: 674e7a35ec3682f1475db91dfe2ed00a6e580f59
URL: https://github.com/llvm/llvm-project/commit/674e7a35ec3682f1475db91dfe2ed00a6e580f59
DIFF: https://github.com/llvm/llvm-project/commit/674e7a35ec3682f1475db91dfe2ed00a6e580f59.diff
LOG: Revert "[llvm-exegesis] Implement the loop repetition mode for AArch64 (#154751)"
This reverts commit 8e4d2b52a7c929c3d93745fc6c81499985aca903.
Added:
Modified:
llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
Removed:
llvm/test/tools/llvm-exegesis/AArch64/loop-register.s
################################################################################
diff --git a/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s b/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s
deleted file mode 100644
index e1ffe462b50c1..0000000000000
--- a/llvm/test/tools/llvm-exegesis/AArch64/loop-register.s
+++ /dev/null
@@ -1,17 +0,0 @@
-REQUIRES: aarch64-registered-target, asserts
-
-RUN: llvm-exegesis -mcpu=neoverse-v2 --use-dummy-perf-counters --mode=latency --debug-only=print-gen-assembly --opcode-name=ADDVv4i16v -repetition-mode=loop 2>&1 | FileCheck %s
-
-CHECK: 0: {{.*}} str x19, [sp, #-16]!
-CHECK-NEXT: 4: {{.*}} movi d[[REG:[0-9]+]], #0000000000000000
-CHECK-NEXT: 8: {{.*}} mov x19, #10000
-CHECK-NEXT: c: {{.*}} nop
-CHECK-NEXT: 10: {{.*}} nop
-CHECK-NEXT: 14: {{.*}} nop
-CHECK-NEXT: 18: {{.*}} nop
-CHECK-NEXT: 1c: {{.*}} nop
-CHECK-NEXT: 20: {{.*}} addv h[[REG]], v[[REG]].4h
-CHECK-NEXT: 24: {{.*}} subs x19, x19, #1
-CHECK-NEXT: 28: {{.*}} b.ne #-8
-CHECK-NEXT: 2c: {{.*}} ldr x19, [sp], #16
-CHECK-NEXT: 30: {{.*}} ret
diff --git a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
index c4ad9ae201d4e..3a0021e3c132d 100644
--- a/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
+++ b/llvm/tools/llvm-exegesis/lib/AArch64/Target.cpp
@@ -8,7 +8,6 @@
#include "../Target.h"
#include "AArch64.h"
#include "AArch64RegisterInfo.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
#if defined(__aarch64__) && defined(__linux__)
#include <sys/prctl.h> // For PR_PAC_* constants
@@ -110,10 +109,6 @@ static MCInst loadFPImmediate(MCRegister Reg, unsigned RegBitWidth,
namespace {
-// Use X19 as the loop counter register since it's a callee-saved register
-// that's available for temporary use.
-constexpr const MCPhysReg kDefaultLoopCounterReg = AArch64::X19;
-
class ExegesisAArch64Target : public ExegesisTarget {
public:
ExegesisAArch64Target()
@@ -146,31 +141,6 @@ class ExegesisAArch64Target : public ExegesisTarget {
errs() << "setRegTo is not implemented, results will be unreliable\n";
return {};
}
- MCRegister getDefaultLoopCounterRegister(const Triple &) const override {
- return kDefaultLoopCounterReg;
- }
-
- void decrementLoopCounterAndJump(MachineBasicBlock &MBB,
- MachineBasicBlock &TargetMBB,
- const MCInstrInfo &MII,
- MCRegister LoopRegister) const override {
- // subs LoopRegister, LoopRegister, #1
- BuildMI(&MBB, DebugLoc(), MII.get(AArch64::SUBSXri))
- .addDef(LoopRegister)
- .addUse(LoopRegister)
- .addImm(1) // Subtract 1
- .addImm(0); // No shift amount
- // b.ne TargetMBB
- BuildMI(&MBB, DebugLoc(), MII.get(AArch64::Bcc))
- .addImm(AArch64CC::NE)
- .addMBB(&TargetMBB);
- }
-
- // Registers that should not be selected for use in snippets.
- const MCPhysReg UnavailableRegisters[1] = {kDefaultLoopCounterReg};
- ArrayRef<MCPhysReg> getUnavailableRegisters() const override {
- return UnavailableRegisters;
- }
bool matchesArch(Triple::ArchType Arch) const override {
return Arch == Triple::aarch64 || Arch == Triple::aarch64_be;
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