[llvm-branch-commits] [clang] [llvm] Add PowerPC/AIX related release notes to LLVM 21.1.0 (PR #154465)

[Amy Kwan via llvm-branch-commits]

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@@ -220,6 +232,7 @@ Changes to the RISC-V Backend
 * Removed -mattr=+no-rvc-hints that could be used to disable parsing and generation of RVC hints.
 * Adds assembler support for the Andes `XAndesvsintload` (Andes Vector INT4 Load extension).
 * Adds assembler support for the Andes `XAndesbfhcvt` (Andes Scalar BFLOAT16 Conversion extension).
+* Add combine for shadd family of instructions.
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amy-kwan wrote:

@stefanp-synopsys FYI, we added this to the LLVM 21.x release notes from your patch: [[RISCV] Add combine for shadd family of instructions.](https://github.com/llvm/llvm-project/pull/130829#top)

If you don't think this is necessary to add, we can remove this.

https://github.com/llvm/llvm-project/pull/154465