[llvm-branch-commits] [llvm] ARM: Move half convert libcall config to tablegen (PR #153389)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Aug 13 16:38:26 PDT 2025
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/153389
>From 377c2923243eab80d39bdb249aa5ed5c60f148cb Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Tue, 5 Aug 2025 19:46:09 +0900
Subject: [PATCH] ARM: Move half convert libcall config to tablegen
---
llvm/include/llvm/IR/RuntimeLibcalls.td | 21 ++++++++++++++++++---
llvm/lib/Target/ARM/ARMISelLowering.cpp | 22 ----------------------
2 files changed, 18 insertions(+), 25 deletions(-)
diff --git a/llvm/include/llvm/IR/RuntimeLibcalls.td b/llvm/include/llvm/IR/RuntimeLibcalls.td
index 736b439748c12..b6664fb2ba908 100644
--- a/llvm/include/llvm/IR/RuntimeLibcalls.td
+++ b/llvm/include/llvm/IR/RuntimeLibcalls.td
@@ -1280,6 +1280,9 @@ def AMDGPUSystemLibrary : SystemRuntimeLibrary<isAMDGPU, (add)>;
// ARM Runtime Libcalls
//===----------------------------------------------------------------------===//
+def isTargetAEABIAndAAPCS_ABI : RuntimeLibcallPredicate<
+ [{TT.isTargetAEABI() && isAAPCS_ABI(TT, ABIName)}]>;
+
// if (isTargetMachO()) {
// if (Subtarget->isThumb() && Subtarget->hasVFP2Base() &&
// Subtarget->hasARMOps() && !Subtarget->useSoftFloat()) {
@@ -1473,13 +1476,23 @@ def __udivmodsi4 : RuntimeLibcallImpl<UDIVREM_I32>;
// a __gnu_ prefix (which is the default).
// isTargetAEABI()
def __aeabi_f2h : RuntimeLibcallImpl<FPROUND_F32_F16>; // CallingConv::ARM_AAPCS
-//def __aeabi_d2h : RuntimeLibcallImpl<FPROUND_F64_F16>; // CallingConv::ARM_AAPCS
def __aeabi_h2f : RuntimeLibcallImpl<FPEXT_F16_F32>; // CallingConv::ARM_AAPCS
// !isTargetMachO()
def __gnu_f2h_ieee : RuntimeLibcallImpl<FPROUND_F32_F16>;
def __gnu_h2f_ieee : RuntimeLibcallImpl<FPEXT_F16_F32>;
+def GNUEABIHalfConvertCalls :
+ LibcallImpls<(add __gnu_f2h_ieee, __gnu_h2f_ieee),
+ RuntimeLibcallPredicate<[{!TT.isOSBinFormatMachO() &&
+ !TT.isTargetAEABI()}]>>;
+
+// In EABI, these functions have an __aeabi_ prefix, but in GNUEABI
+// they have a __gnu_ prefix (which is the default).
+def EABIHalfConvertCalls : LibcallImpls<(add __aeabi_f2h, __aeabi_h2f),
+ isTargetAEABIAndAAPCS_ABI> {
+ let CallingConv = ARM_AAPCS;
+}
def WindowARMDivRemCalls : LibcallImpls<
(add __rt_sdiv, __rt_sdiv64, __rt_udiv, __rt_udiv64),
@@ -1553,8 +1566,8 @@ def AEABICalls : LibcallImpls<
// RTABI chapter 4.1.2, Table 7
__aeabi_d2f,
__aeabi_f2d,
- __aeabi_h2f,
- __aeabi_f2h,
+ //__aeabi_h2f added separately
+ //__aeabi_f2h added separately
__aeabi_d2h,
// Integer to floating-point conversions.
@@ -1614,6 +1627,8 @@ def ARMSystemLibrary
AEABICalls,
AEABI45MemCalls,
+ EABIHalfConvertCalls,
+ GNUEABIHalfConvertCalls,
// Use divmod compiler-rt calls for iOS 5.0 and later.
LibcallImpls<(add __divmodsi4, __udivmodsi4),
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index bd246943f63fc..8ea567cfb9d31 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -587,28 +587,6 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM_,
}
}
- // In EABI, these functions have an __aeabi_ prefix, but in GNUEABI they have
- // a __gnu_ prefix (which is the default).
- if (TT.isTargetAEABI()) {
- // FIXME: This does not depend on the subtarget and should go directly into
- // RuntimeLibcalls. This is only here because of missing support for setting
- // the calling convention of an implementation.
- static const struct {
- const RTLIB::Libcall Op;
- const RTLIB::LibcallImpl Impl;
- } LibraryCalls[] = {
- {RTLIB::FPROUND_F32_F16, RTLIB::__aeabi_f2h},
- {RTLIB::FPEXT_F16_F32, RTLIB::__aeabi_h2f},
- };
-
- for (const auto &LC : LibraryCalls) {
- setLibcallImpl(LC.Op, LC.Impl);
- }
- } else if (!TT.isOSBinFormatMachO()) {
- setLibcallImpl(RTLIB::FPROUND_F32_F16, RTLIB::__gnu_f2h_ieee);
- setLibcallImpl(RTLIB::FPEXT_F16_F32, RTLIB::__gnu_h2f_ieee);
- }
-
if (Subtarget->isThumb1Only())
addRegisterClass(MVT::i32, &ARM::tGPRRegClass);
else
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