[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #148894)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Aug 5 09:51:40 PDT 2025
================
@@ -455,6 +458,18 @@ SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
return Op;
}
+SDValue DAGTypeLegalizer::ScalarizeVecRes_ATOMIC_LOAD(AtomicSDNode *N) {
+ SDValue Result = DAG.getAtomicLoad(
+ ISD::NON_EXTLOAD, SDLoc(N), N->getMemoryVT().getVectorElementType(),
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arsenm wrote:
Yes, but I doubt this is reachable with an extending load
https://github.com/llvm/llvm-project/pull/148894
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