[llvm-branch-commits] [clang] [llvm] [HLSL] Allow resource annotations to specify only register space (PR #135287)

[Helena Kotas via llvm-branch-commits]

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@@ -4723,20 +4723,25 @@ def HLSLResourceBinding: InheritableAttr {
 
   private:
       RegisterType RegType;
-      unsigned SlotNumber;
+      int SlotNumber; // -1 if the register slot was not specified
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hekota wrote:

Good catch! DXC actually ignores the register `u4294967295` and uses `u0` instead, but that is a bug. :) We should support the whole `uint32_t` range.

https://github.com/llvm/llvm-project/pull/135287