[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)
Garvit Gupta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Tue Apr 22 11:55:44 PDT 2025
================
@@ -534,8 +534,14 @@ void baremetal::Linker::ConstructJob(Compilation &C, const JobAction &JA,
CmdArgs.push_back("-Bstatic");
- if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax))
- CmdArgs.push_back("--no-relax");
+ if (Triple.isRISCV()) {
+ if (Args.hasArg(options::OPT_mno_relax))
+ CmdArgs.push_back("--no-relax");
+ CmdArgs.push_back("-m");
+ CmdArgs.push_back(Arch == llvm::Triple::riscv64 ? "elf64lriscv"
+ : "elf32lriscv");
+ CmdArgs.push_back("-X");
+ }
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quic-garvgupt wrote:
Done!
https://github.com/llvm/llvm-project/pull/134442
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