[llvm-branch-commits] [SPARC] Promote i32 CTTZ when we have VIS3 (PR #135894)

[Sergei Barannikov via llvm-branch-commits]

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@@ -1,70 +1,438 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=sparc -mcpu=v9 | FileCheck %s
+; RUN: llc < %s -mtriple=sparc | FileCheck %s -check-prefix=SPARC
+; RUN: llc < %s -mtriple=sparc -mattr=popc | FileCheck %s -check-prefix=SPARC-POPC
+; RUN: llc < %s -mtriple=sparc -mattr=vis3 | FileCheck %s -check-prefix=SPARC-VIS3
+; RUN: llc < %s -mtriple=sparcv9 | FileCheck %s -check-prefix=SPARC64
+; RUN: llc < %s -mtriple=sparcv9 -mattr=popc | FileCheck %s -check-prefix=SPARC64-POPC
+; RUN: llc < %s -mtriple=sparcv9 -mattr=vis3 | FileCheck %s -check-prefix=SPARC64-VIS3
 
-define i32 @f(i32 %x) {
-; CHECK-LABEL: f:
-; CHECK:         .cfi_startproc
-; CHECK-NEXT:  ! %bb.0: ! %entry
-; CHECK-NEXT:    sub %g0, %o0, %o1
-; CHECK-NEXT:    and %o0, %o1, %o1
-; CHECK-NEXT:    sethi 122669, %o2
-; CHECK-NEXT:    or %o2, 305, %o2
-; CHECK-NEXT:    smul %o1, %o2, %o1
-; CHECK-NEXT:    srl %o1, 27, %o1
-; CHECK-NEXT:    sethi %hi(.LCPI0_0), %o2
-; CHECK-NEXT:    add %o2, %lo(.LCPI0_0), %o2
-; CHECK-NEXT:    ldub [%o2+%o1], %o1
-; CHECK-NEXT:    cmp %o0, 0
-; CHECK-NEXT:    move %icc, 0, %o1
-; CHECK-NEXT:    retl
-; CHECK-NEXT:    mov %o1, %o0
-entry:
-  %0 = call i32 @llvm.cttz.i32(i32 %x, i1 true)
-  %1 = icmp eq i32 %x, 0
-  %2 = select i1 %1, i32 0, i32 %0
-  %3 = trunc i32 %2 to i8
-  %conv = zext i8 %3 to i32
-  ret i32 %conv
+;; FIXME the extensionless versions should be a libcall.
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s-barannikov wrote:

So the "extensionless" referred to bare ISA rather than to sext/zext in IR :rofl: Thanks for clarification

https://github.com/llvm/llvm-project/pull/135894