[llvm-branch-commits] [llvm] [ConstraintElim] Add `noundef` to several testcases (NFC) (PR #135799)

via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Fri Apr 18 03:03:42 PDT 2025


https://github.com/el-ev updated https://github.com/llvm/llvm-project/pull/135799

>From 1ee3a28c896f95fe1a1509c10b49648ec57ffbca Mon Sep 17 00:00:00 2001
From: Iris Shi <0.0 at owo.li>
Date: Tue, 15 Apr 2025 23:54:48 +0800
Subject: [PATCH 1/2] [ConstraintElim] Add `noundef` to several testcases (NFC)

---
 .../Transforms/ConstraintElimination/abs.ll   | 149 +++++++++++++-----
 .../ConstraintElimination/uadd-usub-sat.ll    |  32 ++--
 2 files changed, 125 insertions(+), 56 deletions(-)

diff --git a/llvm/test/Transforms/ConstraintElimination/abs.ll b/llvm/test/Transforms/ConstraintElimination/abs.ll
index a49b4643ab92c..bd221acec8c9f 100644
--- a/llvm/test/Transforms/ConstraintElimination/abs.ll
+++ b/llvm/test/Transforms/ConstraintElimination/abs.ll
@@ -1,12 +1,11 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
 ; RUN: opt -passes=constraint-elimination -S %s | FileCheck %s
 
-define i1 @abs_int_min_is_not_poison(i32 %arg) {
+define i1 @abs_int_min_is_not_poison(i32 noundef %arg) {
 ; CHECK-LABEL: define i1 @abs_int_min_is_not_poison(
-; CHECK-SAME: i32 [[ARG:%.*]]) {
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
   %cmp = icmp sge i32 %abs, %arg
@@ -17,21 +16,32 @@ define i1 @abs_int_min_is_poison(i32 %arg) {
 ; CHECK-LABEL: define i1 @abs_int_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %cmp = icmp sge i32 %abs, %arg
   ret i1 %cmp
 }
 
-define i1 @abs_plus_one(i32 %arg) {
-; CHECK-LABEL: define i1 @abs_plus_one(
+define i1 @abs_plus_one_min_is_not_poison(i32 noundef %arg) {
+; CHECK-LABEL: define i1 @abs_plus_one_min_is_not_poison(
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
+; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nsw i32 [[ABS]], 1
+; CHECK-NEXT:    ret i1 true
+;
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
+  %abs_plus_one = add nsw i32 %abs, 1
+  %cmp = icmp sge i32 %abs_plus_one, %arg
+  ret i1 %cmp
+}
+
+define i1 @abs_plus_one_min_is_poison(i32 %arg) {
+; CHECK-LABEL: define i1 @abs_plus_one_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
 ; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nsw i32 [[ABS]], 1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS_PLUS_ONE]], [[ARG]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %abs_plus_one = add nsw i32 %abs, 1
@@ -39,13 +49,26 @@ define i1 @abs_plus_one(i32 %arg) {
   ret i1 %cmp
 }
 
-define i1 @arg_minus_one_strict_less(i32 %arg) {
-; CHECK-LABEL: define i1 @arg_minus_one_strict_less(
+define i1 @arg_minus_one_strict_less_min_is_not_poison(i32 noundef %arg) {
+; CHECK-LABEL: define i1 @arg_minus_one_strict_less_min_is_not_poison(
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
+; CHECK-NEXT:    [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
+; CHECK-NEXT:    ret i1 true
+;
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
+  %arg_minus_one = add nsw i32 %arg, -1
+  %cmp = icmp slt i32 %arg_minus_one, %abs
+  ret i1 %cmp
+}
+
+
+define i1 @arg_minus_one_strict_less_min_is_poison(i32 %arg) {
+; CHECK-LABEL: define i1 @arg_minus_one_strict_less_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
 ; CHECK-NEXT:    [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[ARG_MINUS_ONE]], [[ABS]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %arg_minus_one = add nsw i32 %arg, -1
@@ -53,13 +76,25 @@ define i1 @arg_minus_one_strict_less(i32 %arg) {
   ret i1 %cmp
 }
 
-define i1 @arg_minus_one_strict_greater(i32 %arg) {
-; CHECK-LABEL: define i1 @arg_minus_one_strict_greater(
+define i1 @arg_minus_one_strict_greater_min_is_not_poison(i32 noundef %arg) {
+; CHECK-LABEL: define i1 @arg_minus_one_strict_greater_min_is_not_poison(
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
+; CHECK-NEXT:    [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
+; CHECK-NEXT:    ret i1 false
+;
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
+  %arg_minus_one = add nsw i32 %arg, -1
+  %cmp = icmp sgt i32 %arg_minus_one, %abs
+  ret i1 %cmp
+}
+
+define i1 @arg_minus_one_strict_greater_min_is_poison(i32 %arg) {
+; CHECK-LABEL: define i1 @arg_minus_one_strict_greater_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
 ; CHECK-NEXT:    [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[ARG_MINUS_ONE]], [[ABS]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 false
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %arg_minus_one = add nsw i32 %arg, -1
@@ -67,12 +102,30 @@ define i1 @arg_minus_one_strict_greater(i32 %arg) {
   ret i1 %cmp
 }
 
-define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg(i32 %arg) {
-; CHECK-LABEL: define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg(
+define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg_min_is_not_poison(i32 noundef %arg) {
+; CHECK-LABEL: define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg_min_is_not_poison(
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[CMP_ARG_NONNEGATIVE:%.*]] = icmp sge i32 [[ARG]], 0
+; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP_ARG_NONNEGATIVE]])
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
+; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1
+; CHECK-NEXT:    ret i1 true
+;
+  %cmp_arg_nonnegative = icmp sge i32 %arg, 0
+  call void @llvm.assume(i1 %cmp_arg_nonnegative)
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
+  %abs_plus_one = add nuw i32 %abs, 1
+  %cmp = icmp uge i32 %abs_plus_one, %arg
+  ret i1 %cmp
+}
+
+define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg_min_is_poison(i32 %arg) {
+; CHECK-LABEL: define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[CMP_ARG_NONNEGATIVE:%.*]] = icmp sge i32 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP_ARG_NONNEGATIVE]])
-; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ARG]], 1
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
+; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1
 ; CHECK-NEXT:    ret i1 true
 ;
   %cmp_arg_nonnegative = icmp sge i32 %arg, 0
@@ -83,15 +136,15 @@ define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg(i32 %arg) {
   ret i1 %cmp
 }
 
-define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified(i32 %arg) {
+define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified(i32 noundef %arg) {
 ; CHECK-LABEL: define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified(
-; CHECK-SAME: i32 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
 ; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp uge i32 [[ABS_PLUS_ONE]], [[ARG]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
-  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
   %abs_plus_one = add nuw i32 %abs, 1
   %cmp = icmp uge i32 %abs_plus_one, %arg
   ret i1 %cmp
@@ -99,7 +152,9 @@ define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified(i32 %arg)
 
 define i1 @abs_constant_negative_arg() {
 ; CHECK-LABEL: define i1 @abs_constant_negative_arg() {
-; CHECK-NEXT:    ret i1 true
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 -3, i1 false)
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], 3
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 -3, i1 false)
   %cmp = icmp sge i32 %abs, 3
@@ -108,6 +163,7 @@ define i1 @abs_constant_negative_arg() {
 
 define i1 @abs_constant_positive_arg() {
 ; CHECK-LABEL: define i1 @abs_constant_positive_arg() {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 3, i1 false)
 ; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 3, i1 false)
@@ -127,24 +183,35 @@ define i1 @abs_is_nonnegative_except_for_int_min_if_int_min_is_not_poison(i32 %a
   ret i1 %cmp
 }
 
-define i1 @abs_is_not_strictly_positive(i32 %arg) {
+define i1 @abs_is_not_strictly_positive(i32 noundef %arg) {
 ; CHECK-LABEL: define i1 @abs_is_not_strictly_positive(
-; CHECK-SAME: i32 [[ARG:%.*]]) {
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[ABS]], 0
 ; CHECK-NEXT:    ret i1 [[CMP]]
 ;
-  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
   %cmp = icmp sgt i32 %abs, 0
   ret i1 %cmp
 }
 
+define i1 @abs_is_nonnegative_int_min_is_not_poison(i32 noundef %arg) {
+; CHECK-LABEL: define i1 @abs_is_nonnegative_int_min_is_not_poison(
+; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], 0
+; CHECK-NEXT:    ret i1 [[CMP]]
+;
+  %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 false)
+  %cmp = icmp sge i32 %abs, 0
+  ret i1 %cmp
+}
+
 define i1 @abs_is_nonnegative_int_min_is_poison(i32 %arg) {
 ; CHECK-LABEL: define i1 @abs_is_nonnegative_int_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], 0
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %cmp = icmp sge i32 %abs, 0
@@ -153,6 +220,7 @@ define i1 @abs_is_nonnegative_int_min_is_poison(i32 %arg) {
 
 define i1 @abs_is_nonnegative_constant_arg() {
 ; CHECK-LABEL: define i1 @abs_is_nonnegative_constant_arg() {
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 -3, i1 true)
 ; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 -3, i1 true)
@@ -160,12 +228,13 @@ define i1 @abs_is_nonnegative_constant_arg() {
   ret i1 %cmp
 }
 
-define i64 @abs_assume_nonnegative(i64 %arg) {
+define i64 @abs_assume_nonnegative(i64 noundef %arg) {
 ; CHECK-LABEL: define i64 @abs_assume_nonnegative(
-; CHECK-SAME: i64 [[ARG:%.*]]) {
+; CHECK-SAME: i64 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp sge i64 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    ret i64 [[ARG]]
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i64 @llvm.abs.i64(i64 [[ARG]], i1 false)
+; CHECK-NEXT:    ret i64 [[ABS]]
 ;
   %precond = icmp sge i64 %arg, 0
   call void @llvm.assume(i1 %precond)
@@ -173,12 +242,12 @@ define i64 @abs_assume_nonnegative(i64 %arg) {
   ret i64 %abs
 }
 
-define i64 @abs_assume_negative(i64 %arg) {
+define i64 @abs_assume_negative(i64 noundef %arg) {
 ; CHECK-LABEL: define i64 @abs_assume_negative(
-; CHECK-SAME: i64 [[ARG:%.*]]) {
+; CHECK-SAME: i64 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp slt i64 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    [[ABS:%.*]] = sub i64 0, [[ARG]]
+; CHECK-NEXT:    [[ABS:%.*]] = tail call i64 @llvm.abs.i64(i64 [[ARG]], i1 false)
 ; CHECK-NEXT:    ret i64 [[ABS]]
 ;
   %precond = icmp slt i64 %arg, 0
@@ -188,9 +257,9 @@ define i64 @abs_assume_negative(i64 %arg) {
 }
 
 ; Negative test
-define i64 @abs_assume_unrelated(i64 %arg) {
+define i64 @abs_assume_unrelated(i64 noundef %arg) {
 ; CHECK-LABEL: define i64 @abs_assume_unrelated(
-; CHECK-SAME: i64 [[ARG:%.*]]) {
+; CHECK-SAME: i64 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp slt i64 [[ARG]], 3
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i64 @llvm.abs.i64(i64 [[ARG]], i1 false)
diff --git a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
index 567b5ce6c3a3f..ccb76af3040e1 100644
--- a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
+++ b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
@@ -4,9 +4,9 @@
 declare i64 @llvm.uadd.sat.i64(i64, i64)
 declare i64 @llvm.usub.sat.i64(i64, i64)
 
-define i1 @uadd_sat_uge(i64 %a, i64 %b) {
+define i1 @uadd_sat_uge(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: define i1 @uadd_sat_uge(
-; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[ADD_SAT:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[A]], i64 [[B]])
 ; CHECK-NEXT:    [[CMP:%.*]] = and i1 true, true
 ; CHECK-NEXT:    ret i1 [[CMP]]
@@ -18,24 +18,23 @@ define i1 @uadd_sat_uge(i64 %a, i64 %b) {
   ret i1 %cmp
 }
 
-define i1 @usub_sat_ule_lhs(i64 %a, i64 %b) {
+define i1 @usub_sat_ule_lhs(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: define i1 @usub_sat_ule_lhs(
-; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
-; CHECK-NEXT:    [[CMP:%.*]] = icmp ule i64 [[SUB_SAT]], [[A]]
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %sub.sat = call i64 @llvm.usub.sat.i64(i64 %a, i64 %b)
   %cmp = icmp ule i64 %sub.sat, %a
   ret i1 %cmp
 }
 
-define i64 @usub_sat_when_lhs_ugt_rhs(i64 %a, i64 %b) {
+define i64 @usub_sat_when_lhs_ugt_rhs(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: define i64 @usub_sat_when_lhs_ugt_rhs(
-; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ugt i64 [[A]], [[B]]
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    [[SUB_SAT:%.*]] = sub i64 [[A]], [[B]]
+; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
 ; CHECK-NEXT:    ret i64 [[SUB_SAT]]
 ;
   %precond = icmp ugt i64 %a, %b
@@ -44,12 +43,13 @@ define i64 @usub_sat_when_lhs_ugt_rhs(i64 %a, i64 %b) {
   ret i64 %sub.sat
 }
 
-define i64 @usub_sat_when_lhs_ule_rhs(i64 %a, i64 %b) {
+define i64 @usub_sat_when_lhs_ule_rhs(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: define i64 @usub_sat_when_lhs_ule_rhs(
-; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ule i64 [[A]], [[B]]
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    ret i64 0
+; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
+; CHECK-NEXT:    ret i64 [[SUB_SAT]]
 ;
   %precond = icmp ule i64 %a, %b
   call void @llvm.assume(i1 %precond)
@@ -58,9 +58,9 @@ define i64 @usub_sat_when_lhs_ule_rhs(i64 %a, i64 %b) {
 }
 
 ; Negative test
-define i1 @usub_sat_not_ule_rhs(i64 %a, i64 %b) {
+define i1 @usub_sat_not_ule_rhs(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: define i1 @usub_sat_not_ule_rhs(
-; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
 ; CHECK-NEXT:    [[CMP:%.*]] = icmp ule i64 [[SUB_SAT]], [[B]]
 ; CHECK-NEXT:    ret i1 [[CMP]]
@@ -70,9 +70,9 @@ define i1 @usub_sat_not_ule_rhs(i64 %a, i64 %b) {
   ret i1 %cmp
 }
 
-define i64 @usub_sat_without_precond(i64 %a, i64 %b) {
+define i64 @usub_sat_without_precond(i64 noundef %a, i64 noundef %b) {
 ; CHECK-LABEL: define i64 @usub_sat_without_precond(
-; CHECK-SAME: i64 [[A:%.*]], i64 [[B:%.*]]) {
+; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
 ; CHECK-NEXT:    ret i64 [[SUB_SAT]]
 ;

>From a95ab65584e04a54febf6d845bac37a8f795f9d0 Mon Sep 17 00:00:00 2001
From: Iris Shi <0.0 at owo.li>
Date: Tue, 15 Apr 2025 23:55:46 +0800
Subject: [PATCH 2/2] update check

---
 .../Transforms/ConstraintElimination/abs.ll   | 32 +++++++++----------
 .../ConstraintElimination/uadd-usub-sat.ll    |  5 ++-
 2 files changed, 17 insertions(+), 20 deletions(-)

diff --git a/llvm/test/Transforms/ConstraintElimination/abs.ll b/llvm/test/Transforms/ConstraintElimination/abs.ll
index bd221acec8c9f..f1291e41f13b2 100644
--- a/llvm/test/Transforms/ConstraintElimination/abs.ll
+++ b/llvm/test/Transforms/ConstraintElimination/abs.ll
@@ -16,7 +16,8 @@ define i1 @abs_int_min_is_poison(i32 %arg) {
 ; CHECK-LABEL: define i1 @abs_int_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
-; CHECK-NEXT:    ret i1 true
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], [[ARG]]
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %cmp = icmp sge i32 %abs, %arg
@@ -41,7 +42,8 @@ define i1 @abs_plus_one_min_is_poison(i32 %arg) {
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
 ; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nsw i32 [[ABS]], 1
-; CHECK-NEXT:    ret i1 true
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS_PLUS_ONE]], [[ARG]]
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %abs_plus_one = add nsw i32 %abs, 1
@@ -68,7 +70,8 @@ define i1 @arg_minus_one_strict_less_min_is_poison(i32 %arg) {
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
 ; CHECK-NEXT:    [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
-; CHECK-NEXT:    ret i1 true
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i32 [[ARG_MINUS_ONE]], [[ABS]]
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %arg_minus_one = add nsw i32 %arg, -1
@@ -94,7 +97,8 @@ define i1 @arg_minus_one_strict_greater_min_is_poison(i32 %arg) {
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
 ; CHECK-NEXT:    [[ARG_MINUS_ONE:%.*]] = add nsw i32 [[ARG]], -1
-; CHECK-NEXT:    ret i1 false
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[ARG_MINUS_ONE]], [[ABS]]
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %arg_minus_one = add nsw i32 %arg, -1
@@ -107,8 +111,7 @@ define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg_min_is_not_poi
 ; CHECK-SAME: i32 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[CMP_ARG_NONNEGATIVE:%.*]] = icmp sge i32 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP_ARG_NONNEGATIVE]])
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 false)
-; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1
+; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ARG]], 1
 ; CHECK-NEXT:    ret i1 true
 ;
   %cmp_arg_nonnegative = icmp sge i32 %arg, 0
@@ -124,8 +127,7 @@ define i1 @abs_plus_one_unsigned_greater_or_equal_nonnegative_arg_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[CMP_ARG_NONNEGATIVE:%.*]] = icmp sge i32 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[CMP_ARG_NONNEGATIVE]])
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
-; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ABS]], 1
+; CHECK-NEXT:    [[ABS_PLUS_ONE:%.*]] = add nuw i32 [[ARG]], 1
 ; CHECK-NEXT:    ret i1 true
 ;
   %cmp_arg_nonnegative = icmp sge i32 %arg, 0
@@ -152,9 +154,7 @@ define i1 @abs_plus_one_unsigned_greater_or_equal_cannot_be_simplified(i32 nound
 
 define i1 @abs_constant_negative_arg() {
 ; CHECK-LABEL: define i1 @abs_constant_negative_arg() {
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 -3, i1 false)
-; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], 3
-; CHECK-NEXT:    ret i1 [[CMP]]
+; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 -3, i1 false)
   %cmp = icmp sge i32 %abs, 3
@@ -163,7 +163,6 @@ define i1 @abs_constant_negative_arg() {
 
 define i1 @abs_constant_positive_arg() {
 ; CHECK-LABEL: define i1 @abs_constant_positive_arg() {
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 3, i1 false)
 ; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 3, i1 false)
@@ -211,7 +210,8 @@ define i1 @abs_is_nonnegative_int_min_is_poison(i32 %arg) {
 ; CHECK-LABEL: define i1 @abs_is_nonnegative_int_min_is_poison(
 ; CHECK-SAME: i32 [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 [[ARG]], i1 true)
-; CHECK-NEXT:    ret i1 true
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sge i32 [[ABS]], 0
+; CHECK-NEXT:    ret i1 [[CMP]]
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 %arg, i1 true)
   %cmp = icmp sge i32 %abs, 0
@@ -220,7 +220,6 @@ define i1 @abs_is_nonnegative_int_min_is_poison(i32 %arg) {
 
 define i1 @abs_is_nonnegative_constant_arg() {
 ; CHECK-LABEL: define i1 @abs_is_nonnegative_constant_arg() {
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i32 @llvm.abs.i32(i32 -3, i1 true)
 ; CHECK-NEXT:    ret i1 true
 ;
   %abs = tail call i32 @llvm.abs.i32(i32 -3, i1 true)
@@ -233,8 +232,7 @@ define i64 @abs_assume_nonnegative(i64 noundef %arg) {
 ; CHECK-SAME: i64 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp sge i64 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i64 @llvm.abs.i64(i64 [[ARG]], i1 false)
-; CHECK-NEXT:    ret i64 [[ABS]]
+; CHECK-NEXT:    ret i64 [[ARG]]
 ;
   %precond = icmp sge i64 %arg, 0
   call void @llvm.assume(i1 %precond)
@@ -247,7 +245,7 @@ define i64 @abs_assume_negative(i64 noundef %arg) {
 ; CHECK-SAME: i64 noundef [[ARG:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp slt i64 [[ARG]], 0
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    [[ABS:%.*]] = tail call i64 @llvm.abs.i64(i64 [[ARG]], i1 false)
+; CHECK-NEXT:    [[ABS:%.*]] = sub i64 0, [[ARG]]
 ; CHECK-NEXT:    ret i64 [[ABS]]
 ;
   %precond = icmp slt i64 %arg, 0
diff --git a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
index ccb76af3040e1..f4dd79d9f33ec 100644
--- a/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
+++ b/llvm/test/Transforms/ConstraintElimination/uadd-usub-sat.ll
@@ -34,7 +34,7 @@ define i64 @usub_sat_when_lhs_ugt_rhs(i64 noundef %a, i64 noundef %b) {
 ; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ugt i64 [[A]], [[B]]
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
+; CHECK-NEXT:    [[SUB_SAT:%.*]] = sub i64 [[A]], [[B]]
 ; CHECK-NEXT:    ret i64 [[SUB_SAT]]
 ;
   %precond = icmp ugt i64 %a, %b
@@ -48,8 +48,7 @@ define i64 @usub_sat_when_lhs_ule_rhs(i64 noundef %a, i64 noundef %b) {
 ; CHECK-SAME: i64 noundef [[A:%.*]], i64 noundef [[B:%.*]]) {
 ; CHECK-NEXT:    [[PRECOND:%.*]] = icmp ule i64 [[A]], [[B]]
 ; CHECK-NEXT:    call void @llvm.assume(i1 [[PRECOND]])
-; CHECK-NEXT:    [[SUB_SAT:%.*]] = call i64 @llvm.usub.sat.i64(i64 [[A]], i64 [[B]])
-; CHECK-NEXT:    ret i64 [[SUB_SAT]]
+; CHECK-NEXT:    ret i64 0
 ;
   %precond = icmp ule i64 %a, %b
   call void @llvm.assume(i1 %precond)



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