[llvm-branch-commits] [clang] [RISCV][Driver] Add riscv emulation mode to linker job of BareMetal toolchain (PR #134442)

[Petr Hosek via llvm-branch-commits]

================
@@ -534,8 +534,14 @@ void baremetal::Linker::ConstructJob(Compilation &C, const JobAction &JA,
 
   CmdArgs.push_back("-Bstatic");
 
-  if (TC.getTriple().isRISCV() && Args.hasArg(options::OPT_mno_relax))
-    CmdArgs.push_back("--no-relax");
+  if (Triple.isRISCV()) {
+    if (Args.hasArg(options::OPT_mno_relax))
+      CmdArgs.push_back("--no-relax");
+    CmdArgs.push_back("-m");
+    CmdArgs.push_back(Arch == llvm::Triple::riscv64 ? "elf64lriscv"
+                                                    : "elf32lriscv");
+    CmdArgs.push_back("-X");
+  }
----------------
petrhosek wrote:

This is just a nit, but I'd prefer using the same order as other drivers for consistency.
```suggestion
  if (Triple.isRISCV()) {
    CmdArgs.push_back("-X");
    if (Args.hasArg(options::OPT_mno_relax))
      CmdArgs.push_back("--no-relax");
    CmdArgs.push_back("-m");
    CmdArgs.push_back(Arch == llvm::Triple::riscv64 ? "elf64lriscv"
                                                    : "elf32lriscv");
  }
```

https://github.com/llvm/llvm-project/pull/134442