[llvm-branch-commits] [llvm] 73d1e85 - [CodeGen] Avoid repeated hash lookups (NFC) (#130237)

[Tom Stellard via llvm-branch-commits]

Author: Kazu Hirata
Date: 2025-04-14T12:34:31-07:00
New Revision: 73d1e8598eda19be8edd9eaaefc091228c651217

URL: https://github.com/llvm/llvm-project/commit/73d1e8598eda19be8edd9eaaefc091228c651217
DIFF: https://github.com/llvm/llvm-project/commit/73d1e8598eda19be8edd9eaaefc091228c651217.diff

LOG: [CodeGen] Avoid repeated hash lookups (NFC) (#130237)

(cherry picked from commit 616f277640129ff37d4005737a62acbd60d06ca1)

Added: 
    

Modified: 
    llvm/lib/CodeGen/ModuloSchedule.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp
index f9fe812f7e65c..8fed3a6ff709f 100644
--- a/llvm/lib/CodeGen/ModuloSchedule.cpp
+++ b/llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -464,10 +464,12 @@ void ModuloScheduleExpander::generateExistingPhis(
           InstOp1 = MRI.getVRegDef(PhiOp1);
           int PhiOpStage = Schedule.getStage(InstOp1);
           int StageAdj = (PhiOpStage != -1 ? PhiStage - PhiOpStage : 0);
-          if (PhiOpStage != -1 && PrologStage - StageAdj >= Indirects + np &&
-              VRMap[PrologStage - StageAdj - Indirects - np].count(PhiOp1)) {
-            PhiOp1 = VRMap[PrologStage - StageAdj - Indirects - np][PhiOp1];
-            break;
+          if (PhiOpStage != -1 && PrologStage - StageAdj >= Indirects + np) {
+            auto &M = VRMap[PrologStage - StageAdj - Indirects - np];
+            if (auto It = M.find(PhiOp1); It != M.end()) {
+              PhiOp1 = It->second;
+              break;
+            }
           }
           ++Indirects;
         }
@@ -597,8 +599,11 @@ void ModuloScheduleExpander::generateExistingPhis(
 
     // Check if we need to rename a Phi that has been eliminated due to
     // scheduling.
-    if (NumStages == 0 && IsLast && VRMap[CurStageNum].count(LoopVal))
-      replaceRegUsesAfterLoop(Def, VRMap[CurStageNum][LoopVal], BB, MRI, LIS);
+    if (NumStages == 0 && IsLast) {
+      auto It = VRMap[CurStageNum].find(LoopVal);
+      if (It != VRMap[CurStageNum].end())
+        replaceRegUsesAfterLoop(Def, It->second, BB, MRI, LIS);
+    }
   }
 }