[llvm-branch-commits] [llvm] Add initial support for SPE brstack format (PR #129231)

[Ádám Kallai via llvm-branch-commits]

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@@ -113,6 +153,37 @@ TEST_F(PerfSpeEventsTestHelper, SpeBranches) {
   EXPECT_TRUE(checkEvents(1234, 10, {"branches-spe:"}));
 }
 
+TEST_F(PerfSpeEventsTestHelper, SpeBranchesWithBrstack) {
+  // Check perf input with SPE branch events as brstack format.
+  // Example collection command:
+  // ```
+  // perf record -e 'arm_spe_0/branch_filter=1/u' -- BINARY
+  // ```
+  // How Bolt extracts the branch events:
+  // ```
+  // perf script -F pid,brstack --itrace=bl
+  // ```
+
+  opts::ArmSPE = true;
+  opts::ReadPerfEvents = "  1234  0xa001/0xa002/PN/-/-/10/COND/-\n"
+                         "  1234  0xb001/0xb002/P/-/-/4/RET/-\n"
+                         "  1234  0xc001/0xc002/P/-/-/13/-/-\n"
+                         "  1234  0xd001/0xd002/M/-/-/7/RET/-\n"
+                         "  1234  0xe001/0xe002/P/-/-/14/RET/-\n"
+                         "  1234  0xf001/0xf002/MN/-/-/8/COND/-\n";
+
+  LBREntry Entry1 = {0xa001, 0xa002, false};
+  LBREntry Entry2 = {0xb001, 0xb002, false};
+  LBREntry Entry3 = {0xc001, 0xc002, false};
+  LBREntry Entry4 = {0xd001, 0xd002, true};
+  LBREntry Entry5 = {0xe001, 0xe002, false};
+  LBREntry Entry6 = {0xf001, 0xf002, true};
+  std::vector<SmallVector<LBREntry, 2>> ExpectedSamples = {
+      {{Entry1}}, {{Entry2}}, {{Entry3}}, {{Entry4}}, {{Entry5}}, {{Entry6}},
+  };
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kaadam wrote:

Simplified, thanks for the hint. 

https://github.com/llvm/llvm-project/pull/129231