[llvm-branch-commits] [llvm] [NewPM][CodeGen] Port LiveRegMatrix to NPM (PR #109938)
Akshat Oke via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Sep 25 04:16:47 PDT 2024
https://github.com/Akshat-Oke updated https://github.com/llvm/llvm-project/pull/109938
>From 22bb8f0e07088515380c2948ce7b37a041a67e0e Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Tue, 24 Sep 2024 09:07:04 +0000
Subject: [PATCH] [NewPM][CodeGen] Port LiveRegMatrix to NPM
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 50 ++++++++++++++++---
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 4 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 38 ++++++++++----
llvm/lib/CodeGen/RegAllocBasic.cpp | 8 +--
llvm/lib/CodeGen/RegAllocGreedy.cpp | 8 +--
llvm/lib/Passes/PassBuilder.cpp | 1 +
llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 6 +--
.../Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 6 +--
9 files changed, 88 insertions(+), 35 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index 2b32308c7c075e..c024ca9c1dc38d 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -37,7 +37,9 @@ class MachineFunction;
class TargetRegisterInfo;
class VirtRegMap;
-class LiveRegMatrix : public MachineFunctionPass {
+class LiveRegMatrix {
+ friend class LiveRegMatrixWrapperPass;
+ friend class LiveRegMatrixAnalysis;
const TargetRegisterInfo *TRI = nullptr;
LiveIntervals *LIS = nullptr;
VirtRegMap *VRM = nullptr;
@@ -57,15 +59,21 @@ class LiveRegMatrix : public MachineFunctionPass {
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
- // MachineFunctionPass boilerplate.
- void getAnalysisUsage(AnalysisUsage &) const override;
- bool runOnMachineFunction(MachineFunction &) override;
- void releaseMemory() override;
+ LiveRegMatrix() = default;
+ void releaseMemory();
public:
- static char ID;
-
- LiveRegMatrix();
+ LiveRegMatrix(LiveRegMatrix &&Other)
+ : TRI(Other.TRI), LIS(Other.LIS), VRM(Other.VRM), UserTag(Other.UserTag),
+ Matrix(std::move(Other.Matrix)), Queries(std::move(Other.Queries)),
+ RegMaskTag(Other.RegMaskTag), RegMaskVirtReg(Other.RegMaskVirtReg),
+ RegMaskUsable(std::move(Other.RegMaskUsable)) {
+ Other.TRI = nullptr;
+ Other.LIS = nullptr;
+ Other.VRM = nullptr;
+ }
+
+ void init(MachineFunction &MF, LiveIntervals *LIS, VirtRegMap *VRM);
//===--------------------------------------------------------------------===//
// High-level interface.
@@ -159,6 +167,32 @@ class LiveRegMatrix : public MachineFunctionPass {
Register getOneVReg(unsigned PhysReg) const;
};
+class LiveRegMatrixWrapperPass : public MachineFunctionPass {
+ LiveRegMatrix LRM;
+
+public:
+ static char ID;
+
+ LiveRegMatrixWrapperPass() : MachineFunctionPass(ID) {}
+
+ LiveRegMatrix &getLRM() { return LRM; }
+ const LiveRegMatrix &getLRM() const { return LRM; }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ void releaseMemory() override;
+};
+
+class LiveRegMatrixAnalysis : public AnalysisInfoMixin<LiveRegMatrixAnalysis> {
+ friend AnalysisInfoMixin<LiveRegMatrixAnalysis>;
+ static AnalysisKey Key;
+
+public:
+ using Result = LiveRegMatrix;
+
+ LiveRegMatrix run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+};
+
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEREGMATRIX_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 9ce92d7da8700b..8c5607b33096f2 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -156,7 +156,7 @@ void initializeLiveDebugValuesPass(PassRegistry &);
void initializeLiveDebugVariablesPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
-void initializeLiveRegMatrixPass(PassRegistry &);
+void initializeLiveRegMatrixWrapperPassPass(PassRegistry &);
void initializeLiveStacksPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index bdc56ca03f392a..4497c1fce0db69 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -97,6 +97,7 @@ LOOP_PASS("loop-term-fold", LoopTermFoldPass())
// preferably fix the scavenger to not depend on them).
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
+MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-block-freq", MachineBlockFrequencyAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
MachineBranchProbabilityAnalysis())
@@ -122,8 +123,7 @@ MACHINE_FUNCTION_ANALYSIS("virtregmap", VirtRegMapAnalysis())
// MachineRegionInfoPassAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics",
// MachineTraceMetricsAnalysis()) MACHINE_FUNCTION_ANALYSIS("reaching-def",
-// ReachingDefAnalysisAnalysis()) MACHINE_FUNCTION_ANALYSIS("live-reg-matrix",
-// LiveRegMatrixAnalysis()) MACHINE_FUNCTION_ANALYSIS("gc-analysis",
+// ReachingDefAnalysisAnalysis()) MACHINE_FUNCTION_ANALYSIS("gc-analysis",
// GCMachineCodeAnalysisPass())
#undef MACHINE_FUNCTION_ANALYSIS
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index af8cd0f09b558d..35c173d571333b 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -35,27 +35,33 @@ using namespace llvm;
STATISTIC(NumAssigned , "Number of registers assigned");
STATISTIC(NumUnassigned , "Number of registers unassigned");
-char LiveRegMatrix::ID = 0;
-INITIALIZE_PASS_BEGIN(LiveRegMatrix, "liveregmatrix",
+char LiveRegMatrixWrapperPass::ID = 0;
+INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperPass, "liveregmatrix",
"Live Register Matrix", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperPass)
-INITIALIZE_PASS_END(LiveRegMatrix, "liveregmatrix",
+INITIALIZE_PASS_END(LiveRegMatrixWrapperPass, "liveregmatrix",
"Live Register Matrix", false, false)
-LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID) {}
-
-void LiveRegMatrix::getAnalysisUsage(AnalysisUsage &AU) const {
+void LiveRegMatrixWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequiredTransitive<LiveIntervalsWrapperPass>();
AU.addRequiredTransitive<VirtRegMapWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
-bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
+bool LiveRegMatrixWrapperPass::runOnMachineFunction(MachineFunction &MF) {
+ auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
+ auto *VRM = &getAnalysis<VirtRegMapWrapperPass>().getVRM();
+ LRM.init(MF, LIS, VRM);
+ return false;
+}
+
+void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals *pLIS,
+ VirtRegMap *pVRM) {
TRI = MF.getSubtarget().getRegisterInfo();
- LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- VRM = &getAnalysis<VirtRegMapWrapperPass>().getVRM();
+ LIS = pLIS;
+ VRM = pVRM;
unsigned NumRegUnits = TRI->getNumRegUnits();
if (NumRegUnits != Matrix.size())
@@ -64,9 +70,10 @@ bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
// Make sure no stale queries get reused.
invalidateVirtRegs();
- return false;
}
+void LiveRegMatrixWrapperPass::releaseMemory() { LRM.releaseMemory(); }
+
void LiveRegMatrix::releaseMemory() {
for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
Matrix[i].clear();
@@ -246,3 +253,14 @@ Register LiveRegMatrix::getOneVReg(unsigned PhysReg) const {
return MCRegister::NoRegister;
}
+
+AnalysisKey LiveRegMatrixAnalysis::Key;
+
+LiveRegMatrix LiveRegMatrixAnalysis::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
+ auto &VRM = MFAM.getResult<VirtRegMapAnalysis>(MF);
+ LiveRegMatrix LRM;
+ LRM.init(MF, &LIS, &VRM);
+ return LRM;
+}
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index ac28c5801c2046..13b473ffdb1a99 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -139,7 +139,7 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_END(RABasic, "regallocbasic", "Basic Register Allocator", false,
false)
@@ -190,8 +190,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMapWrapperPass>();
AU.addPreserved<VirtRegMapWrapperPass>();
- AU.addRequired<LiveRegMatrix>();
- AU.addPreserved<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
+ AU.addPreserved<LiveRegMatrixWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -309,7 +309,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
RegAllocBase::init(getAnalysis<VirtRegMapWrapperPass>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
- getAnalysis<LiveRegMatrix>());
+ getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
VirtRegAuxInfo VRAI(
*MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index bbf4e5665365e2..928eb266031b59 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -163,7 +163,7 @@ INITIALIZE_PASS_DEPENDENCY(LiveStacks)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
INITIALIZE_PASS_DEPENDENCY(SpillPlacement)
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
@@ -217,8 +217,8 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMapWrapperPass>();
AU.addPreserved<VirtRegMapWrapperPass>();
- AU.addRequired<LiveRegMatrix>();
- AU.addPreserved<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
+ AU.addPreserved<LiveRegMatrixWrapperPass>();
AU.addRequired<EdgeBundles>();
AU.addRequired<SpillPlacement>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
@@ -2715,7 +2715,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
RegAllocBase::init(getAnalysis<VirtRegMapWrapperPass>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
- getAnalysis<LiveRegMatrix>());
+ getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
// Early return if there is no virtual register to be allocated to a
// physical register.
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 90e71d8a99db23..efa1096a4cd775 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -94,6 +94,7 @@
#include "llvm/CodeGen/InterleavedLoadCombine.h"
#include "llvm/CodeGen/JMCInstrumenter.h"
#include "llvm/CodeGen/LiveIntervals.h"
+#include "llvm/CodeGen/LiveRegMatrix.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/LocalStackSlotAllocation.h"
#include "llvm/CodeGen/LowerEmuTLS.h"
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
index da6c851070adbf..5ac4449104d328 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
@@ -50,7 +50,7 @@ class GCNNSAReassign : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addRequired<VirtRegMapWrapperPass>();
- AU.addRequired<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -96,7 +96,7 @@ INITIALIZE_PASS_BEGIN(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_END(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
false, false)
@@ -243,7 +243,7 @@ bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
TRI = ST->getRegisterInfo();
VRM = &getAnalysis<VirtRegMapWrapperPass>().getVRM();
- LRM = &getAnalysis<LiveRegMatrix>();
+ LRM = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
diff --git a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
index e45405bd21c02d..0635cab7b872e2 100644
--- a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
@@ -61,7 +61,7 @@ class SIPreAllocateWWMRegs : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addRequired<VirtRegMapWrapperPass>();
- AU.addRequired<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -77,7 +77,7 @@ INITIALIZE_PASS_BEGIN(SIPreAllocateWWMRegs, DEBUG_TYPE,
"SI Pre-allocate WWM Registers", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperPass)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_END(SIPreAllocateWWMRegs, DEBUG_TYPE,
"SI Pre-allocate WWM Registers", false, false)
@@ -194,7 +194,7 @@ bool SIPreAllocateWWMRegs::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- Matrix = &getAnalysis<LiveRegMatrix>();
+ Matrix = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
VRM = &getAnalysis<VirtRegMapWrapperPass>().getVRM();
RegClassInfo.runOnMachineFunction(MF);
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