[llvm-branch-commits] [llvm] 22139b3 - Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (#108061)
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Sep 23 23:15:31 PDT 2024
Author: Andrew Ng
Date: 2024-09-24T08:15:17+02:00
New Revision: 22139b36d7a81cd2dc08e9499a915def4aefc64e
URL: https://github.com/llvm/llvm-project/commit/22139b36d7a81cd2dc08e9499a915def4aefc64e
DIFF: https://github.com/llvm/llvm-project/commit/22139b36d7a81cd2dc08e9499a915def4aefc64e.diff
LOG: Reland [llvm-ml] Fix RIP-relative addressing for ptr operands (#108061)
Relands #107618 with fix for assertion triggered by OpenMP runtime MASM
assembly source.
(cherry picked from commit 7574e1ddc4be63628cb7617857cc8938058a79d2)
Added:
Modified:
llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
llvm/test/tools/llvm-ml/rip_relative_addressing.asm
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
index c7f88fed9b128b..efbcb57add98c9 100644
--- a/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -2707,7 +2707,8 @@ bool X86AsmParser::parseIntelOperand(OperandVector &Operands, StringRef Name) {
bool MaybeDirectBranchDest = true;
if (Parser.isParsingMasm()) {
- if (is64BitMode() && SM.getElementSize() > 0) {
+ if (is64BitMode() &&
+ ((PtrInOperand && !IndexReg) || SM.getElementSize() > 0)) {
DefaultBaseReg = X86::RIP;
}
if (IsUnconditionalBranch) {
diff --git a/llvm/test/tools/llvm-ml/rip_relative_addressing.asm b/llvm/test/tools/llvm-ml/rip_relative_addressing.asm
index d237e84435b7d6..c005b9721c07e0 100644
--- a/llvm/test/tools/llvm-ml/rip_relative_addressing.asm
+++ b/llvm/test/tools/llvm-ml/rip_relative_addressing.asm
@@ -53,4 +53,14 @@ mov eax, [t8]
; CHECK-LABEL: t8:
; CHECK: mov eax, dword ptr [t8]
-END
\ No newline at end of file
+t9:
+mov eax, dword ptr [bar]
+; CHECK-LABEL: t9:
+; CHECK-32: mov eax, dword ptr [bar]
+; CHECK-64: mov eax, dword ptr [rip + bar]
+
+t10:
+mov ebx, dword ptr [4*eax]
+; CHECK: mov ebx, dword ptr [4*eax]
+
+END
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