[llvm-branch-commits] [llvm] [X86][APX] Fix wrong encoding of promoted KMOV instructions due to missing NoCD8 (#109579) (PR #109635)
Phoebe Wang via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Sep 23 01:38:47 PDT 2024
https://github.com/phoebewang created https://github.com/llvm/llvm-project/pull/109635
Promoted KMOV* was encoded with CD8 incorrectly, see https://godbolt.org/z/cax513hG1
>From b403d2a05b548f24b46bab4c4ae014c9949f3c44 Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang at intel.com>
Date: Mon, 23 Sep 2024 09:41:43 +0800
Subject: [PATCH] [X86][APX] Fix wrong encoding of promoted KMOV instructions
due to missing NoCD8 (#109579)
Promoted KMOV* was encoded with CD8 incorrectly, see
https://godbolt.org/z/cax513hG1
---
llvm/lib/Target/X86/X86InstrAVX512.td | 27 +++++++++++-----------
llvm/test/MC/Disassembler/X86/apx/kmov.txt | 16 +++++++++++++
llvm/test/MC/X86/apx/kmov-att.s | 14 ++++++++++-
llvm/test/MC/X86/apx/kmov-intel.s | 12 ++++++++++
4 files changed, 55 insertions(+), 14 deletions(-)
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index da690aea43f5c0..1bf201f2bb87e4 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -2617,19 +2617,20 @@ defm VFPCLASS : avx512_fp_fpclass_all<"vfpclass", 0x66, 0x67, SchedWriteFCmp>, E
multiclass avx512_mask_mov<bits<8> opc_kk, bits<8> opc_km, bits<8> opc_mk,
string OpcodeStr, RegisterClass KRC, ValueType vvt,
X86MemOperand x86memop, string Suffix = ""> {
- let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove],
- explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in
- def kk#Suffix : I<opc_kk, MRMSrcReg, (outs KRC:$dst), (ins KRC:$src),
- !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), []>,
- Sched<[WriteMove]>;
- def km#Suffix : I<opc_km, MRMSrcMem, (outs KRC:$dst), (ins x86memop:$src),
- !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
- [(set KRC:$dst, (vvt (load addr:$src)))]>,
- Sched<[WriteLoad]>;
- def mk#Suffix : I<opc_mk, MRMDestMem, (outs), (ins x86memop:$dst, KRC:$src),
- !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
- [(store KRC:$src, addr:$dst)]>,
- Sched<[WriteStore]>;
+ let explicitOpPrefix = !if(!eq(Suffix, ""), NoExplicitOpPrefix, ExplicitEVEX) in {
+ let isMoveReg = 1, hasSideEffects = 0, SchedRW = [WriteMove] in
+ def kk#Suffix : I<opc_kk, MRMSrcReg, (outs KRC:$dst), (ins KRC:$src),
+ !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"), []>,
+ Sched<[WriteMove]>;
+ def km#Suffix : I<opc_km, MRMSrcMem, (outs KRC:$dst), (ins x86memop:$src),
+ !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
+ [(set KRC:$dst, (vvt (load addr:$src)))]>,
+ Sched<[WriteLoad]>, NoCD8;
+ def mk#Suffix : I<opc_mk, MRMDestMem, (outs), (ins x86memop:$dst, KRC:$src),
+ !strconcat(OpcodeStr, "\t{$src, $dst|$dst, $src}"),
+ [(store KRC:$src, addr:$dst)]>,
+ Sched<[WriteStore]>, NoCD8;
+ }
}
multiclass avx512_mask_mov_gpr<bits<8> opc_kr, bits<8> opc_rk,
diff --git a/llvm/test/MC/Disassembler/X86/apx/kmov.txt b/llvm/test/MC/Disassembler/X86/apx/kmov.txt
index 5d947ff39f2314..45fedbd0da587b 100644
--- a/llvm/test/MC/Disassembler/X86/apx/kmov.txt
+++ b/llvm/test/MC/Disassembler/X86/apx/kmov.txt
@@ -17,6 +17,22 @@
# INTEL: {evex} kmovq k2, k1
0x62,0xf1,0xfc,0x08,0x90,0xd1
+# ATT: {evex} kmovb -16(%rax), %k0
+# INTEL: {evex} kmovb k0, byte ptr [rax - 16]
+0x62,0xf1,0x7d,0x08,0x90,0x40,0xf0
+
+# ATT: {evex} kmovw -16(%rax), %k0
+# INTEL: {evex} kmovw k0, word ptr [rax - 16]
+0x62,0xf1,0x7c,0x08,0x90,0x40,0xf0
+
+# ATT: {evex} kmovd -16(%rax), %k0
+# INTEL: {evex} kmovd k0, dword ptr [rax - 16]
+0x62,0xf1,0xfd,0x08,0x90,0x40,0xf0
+
+# ATT: {evex} kmovq -16(%rax), %k0
+# INTEL: {evex} kmovq k0, qword ptr [rax - 16]
+0x62,0xf1,0xfc,0x08,0x90,0x40,0xf0
+
# ATT-NOT: {evex}
# INTEL-NOT: {evex}
diff --git a/llvm/test/MC/X86/apx/kmov-att.s b/llvm/test/MC/X86/apx/kmov-att.s
index 949ef65be98d4c..5f59e0a505b235 100644
--- a/llvm/test/MC/X86/apx/kmov-att.s
+++ b/llvm/test/MC/X86/apx/kmov-att.s
@@ -1,7 +1,7 @@
# RUN: llvm-mc -triple x86_64 -show-encoding %s | FileCheck %s
# RUN: not llvm-mc -triple i386 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
-# ERROR-COUNT-20: error:
+# ERROR-COUNT-24: error:
# ERROR-NOT: error:
# CHECK: {evex} kmovb %k1, %k2
# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0xd1]
@@ -15,6 +15,18 @@
# CHECK: {evex} kmovq %k1, %k2
# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
{evex} kmovq %k1, %k2
+# CHECK: {evex} kmovb -16(%rax), %k0
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0x40,0xf0]
+ {evex} kmovb -0x10(%rax), %k0
+# CHECK: {evex} kmovw -16(%rax), %k0
+# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0x40,0xf0]
+ {evex} kmovw -0x10(%rax), %k0
+# CHECK: {evex} kmovd -16(%rax), %k0
+# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0x40,0xf0]
+ {evex} kmovd -0x10(%rax), %k0
+# CHECK: {evex} kmovq -16(%rax), %k0
+# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0x40,0xf0]
+ {evex} kmovq -0x10(%rax), %k0
# CHECK-NOT: {evex}
diff --git a/llvm/test/MC/X86/apx/kmov-intel.s b/llvm/test/MC/X86/apx/kmov-intel.s
index 0cdbd310062eba..51cec67caf9a04 100644
--- a/llvm/test/MC/X86/apx/kmov-intel.s
+++ b/llvm/test/MC/X86/apx/kmov-intel.s
@@ -12,6 +12,18 @@
# CHECK: {evex} kmovq k2, k1
# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0xd1]
{evex} kmovq k2, k1
+# CHECK: {evex} kmovb k0, byte ptr [rax - 16]
+# CHECK: encoding: [0x62,0xf1,0x7d,0x08,0x90,0x40,0xf0]
+ {evex} kmovb k0, byte ptr [rax - 0x10]
+# CHECK: {evex} kmovw k0, word ptr [rax - 16]
+# CHECK: encoding: [0x62,0xf1,0x7c,0x08,0x90,0x40,0xf0]
+ {evex} kmovw k0, word ptr [rax - 0x10]
+# CHECK: {evex} kmovd k0, dword ptr [rax - 16]
+# CHECK: encoding: [0x62,0xf1,0xfd,0x08,0x90,0x40,0xf0]
+ {evex} kmovd k0, dword ptr [rax - 0x10]
+# CHECK: {evex} kmovq k0, qword ptr [rax - 16]
+# CHECK: encoding: [0x62,0xf1,0xfc,0x08,0x90,0x40,0xf0]
+ {evex} kmovq k0, qword ptr [rax - 0x10]
# CHECK-NOT: {evex}
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