[llvm-branch-commits] [llvm] [TargetTransformInfo] Remove `getFlatAddressSpace` (PR #108787)
Shilei Tian via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Sep 18 11:49:06 PDT 2024
https://github.com/shiltian updated https://github.com/llvm/llvm-project/pull/108787
>From e6fb6d58ce5cd8d02d769e1a4eb9664449fb785b Mon Sep 17 00:00:00 2001
From: Shilei Tian <i at tianshilei.me>
Date: Sun, 15 Sep 2024 23:06:14 -0400
Subject: [PATCH] [TargetTransformInfo] Remove `getFlatAddressSpace`
This has been moved to `DataLayout`.
---
.../llvm/Analysis/TargetTransformInfo.h | 21 -------------------
.../llvm/Analysis/TargetTransformInfoImpl.h | 2 --
llvm/include/llvm/CodeGen/BasicTTIImpl.h | 5 -----
llvm/lib/Analysis/TargetTransformInfo.cpp | 4 ----
.../Target/AMDGPU/AMDGPUTargetTransformInfo.h | 8 -------
.../Target/NVPTX/NVPTXTargetTransformInfo.h | 4 ----
.../Transforms/Scalar/InferAddressSpaces.cpp | 5 +++--
.../AMDGPU/noop-ptrint-pair.ll | 2 +-
.../old-pass-regressions-inseltpoison.ll | 2 +-
.../AMDGPU/old-pass-regressions.ll | 2 +-
.../InferAddressSpaces/AMDGPU/ptrmask.ll | 2 +-
11 files changed, 7 insertions(+), 50 deletions(-)
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfo.h b/llvm/include/llvm/Analysis/TargetTransformInfo.h
index 3411163549de2f..42d3ee328fc1a5 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfo.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfo.h
@@ -451,24 +451,6 @@ class TargetTransformInfo {
/// Return false if a \p AS0 address cannot possibly alias a \p AS1 address.
bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const;
- /// Returns the address space ID for a target's 'flat' address space. Note
- /// this is not necessarily the same as addrspace(0), which LLVM sometimes
- /// refers to as the generic address space. The flat address space is a
- /// generic address space that can be used access multiple segments of memory
- /// with different address spaces. Access of a memory location through a
- /// pointer with this address space is expected to be legal but slower
- /// compared to the same memory location accessed through a pointer with a
- /// different address space.
- //
- /// This is for targets with different pointer representations which can
- /// be converted with the addrspacecast instruction. If a pointer is converted
- /// to this address space, optimizations should attempt to replace the access
- /// with the source address space.
- ///
- /// \returns ~0u if the target does not have such a flat address space to
- /// optimize away.
- unsigned getFlatAddressSpace() const;
-
/// Return any intrinsic address operand indexes which may be rewritten if
/// they use a flat address space pointer.
///
@@ -1838,7 +1820,6 @@ class TargetTransformInfo::Concept {
virtual bool isAlwaysUniform(const Value *V) = 0;
virtual bool isValidAddrSpaceCast(unsigned FromAS, unsigned ToAS) const = 0;
virtual bool addrspacesMayAlias(unsigned AS0, unsigned AS1) const = 0;
- virtual unsigned getFlatAddressSpace() = 0;
virtual bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const = 0;
virtual bool isNoopAddrSpaceCast(unsigned FromAS, unsigned ToAS) const = 0;
@@ -2266,8 +2247,6 @@ class TargetTransformInfo::Model final : public TargetTransformInfo::Concept {
return Impl.addrspacesMayAlias(AS0, AS1);
}
- unsigned getFlatAddressSpace() override { return Impl.getFlatAddressSpace(); }
-
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const override {
return Impl.collectFlatAddressOperands(OpIndexes, IID);
diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
index 2819af30cd1704..3902a19a90755a 100644
--- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
+++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
@@ -115,8 +115,6 @@ class TargetTransformInfoImplBase {
return true;
}
- unsigned getFlatAddressSpace() const { return -1; }
-
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const {
return false;
diff --git a/llvm/include/llvm/CodeGen/BasicTTIImpl.h b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
index 2f2a6a09ffc44d..ce585dfc7a2f39 100644
--- a/llvm/include/llvm/CodeGen/BasicTTIImpl.h
+++ b/llvm/include/llvm/CodeGen/BasicTTIImpl.h
@@ -292,11 +292,6 @@ class BasicTTIImplBase : public TargetTransformInfoImplCRTPBase<T> {
return true;
}
- unsigned getFlatAddressSpace() {
- // Return an invalid address space.
- return -1;
- }
-
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const {
return false;
diff --git a/llvm/lib/Analysis/TargetTransformInfo.cpp b/llvm/lib/Analysis/TargetTransformInfo.cpp
index 67b626f300a101..42e3f277c1e291 100644
--- a/llvm/lib/Analysis/TargetTransformInfo.cpp
+++ b/llvm/lib/Analysis/TargetTransformInfo.cpp
@@ -305,10 +305,6 @@ bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
}
-unsigned TargetTransformInfo::getFlatAddressSpace() const {
- return TTIImpl->getFlatAddressSpace();
-}
-
bool TargetTransformInfo::collectFlatAddressOperands(
SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index 01df2e6caaba1d..6f32e439231273 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -200,14 +200,6 @@ class GCNTTIImpl final : public BasicTTIImplBase<GCNTTIImpl> {
return AMDGPU::addrspacesMayAlias(AS0, AS1);
}
- unsigned getFlatAddressSpace() const {
- // Don't bother running InferAddressSpaces pass on graphics shaders which
- // don't use flat addressing.
- if (IsGraphics)
- return -1;
- return AMDGPUAS::FLAT_ADDRESS;
- }
-
bool collectFlatAddressOperands(SmallVectorImpl<int> &OpIndexes,
Intrinsic::ID IID) const;
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
index 4160f5f6bfae76..fd03b565ccf917 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
@@ -45,10 +45,6 @@ class NVPTXTTIImpl : public BasicTTIImplBase<NVPTXTTIImpl> {
bool isSourceOfDivergence(const Value *V);
- unsigned getFlatAddressSpace() const {
- return AddressSpace::ADDRESS_SPACE_GENERIC;
- }
-
bool canHaveNonUndefGlobalInitializerInAddressSpace(unsigned AS) const {
return AS != AddressSpace::ADDRESS_SPACE_SHARED &&
AS != AddressSpace::ADDRESS_SPACE_LOCAL && AS != ADDRESS_SPACE_PARAM;
diff --git a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
index 566cdc51f6e74a..5aff29557e7972 100644
--- a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+++ b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
@@ -854,9 +854,10 @@ bool InferAddressSpacesImpl::run(Function &CurFn) {
FlatAddrSpace = 0;
if (FlatAddrSpace == UninitializedAddressSpace) {
- FlatAddrSpace = TTI->getFlatAddressSpace();
- if (FlatAddrSpace == UninitializedAddressSpace)
+ if (!DL->getFlatAddressSpace().has_value())
return false;
+ FlatAddrSpace = DL->getFlatAddressSpace().value();
+ assert(FlatAddrSpace != UninitializedAddressSpace);
}
// Collects all flat address expressions in postorder.
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
index 422ac0dfd2cd47..cdd9a789869a24 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/noop-ptrint-pair.ll
@@ -1,7 +1,7 @@
; RUN: opt -mtriple=amdgcn-amd-amdhsa -S -o - -passes=infer-address-spaces %s | FileCheck -check-prefixes=COMMON,AMDGCN %s
; RUN: opt -S -o - -passes=infer-address-spaces -assume-default-is-flat-addrspace %s | FileCheck -check-prefixes=COMMON,NOTTI %s
-target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7:8"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7:8-T0"
; COMMON-LABEL: @noop_ptrint_pair(
; AMDGCN-NEXT: store i32 0, ptr addrspace(1) %{{.*}}
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
index 5a2244b9796e84..7643e94348e594 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions-inseltpoison.ll
@@ -1,4 +1,4 @@
-; RUN: opt -data-layout=A5 -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
+; RUN: opt -data-layout=A5-T0 -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
; Regression tests from old HSAIL addrspacecast optimization pass
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
index d2b4b98cc80b83..3b5c9c4be36c9f 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/old-pass-regressions.ll
@@ -1,4 +1,4 @@
-; RUN: opt -data-layout=A5 -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
+; RUN: opt -data-layout=A5-T0 -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
; Regression tests from old HSAIL addrspacecast optimization pass
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll
index 857132a0d10fca..875e29fa19d3f3 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/ptrmask.ll
@@ -1,7 +1,7 @@
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces,instsimplify %s | FileCheck %s
-target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
+target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-T0"
define i8 @ptrmask_cast_local_to_flat(ptr addrspace(3) %src.ptr, i64 %mask) {
; CHECK-LABEL: @ptrmask_cast_local_to_flat(
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