[llvm-branch-commits] [llvm] bd4ff65 - Revert "[LoongArch] Eliminate the redundant sign extension of division (#107971)"

[Tobias Hieta via llvm-branch-commits]

Author: Tobias Hieta
Date: 2024-09-17T09:39:01+02:00
New Revision: bd4ff65a601895ba816623cddb36ce466cceabe6

URL: https://github.com/llvm/llvm-project/commit/bd4ff65a601895ba816623cddb36ce466cceabe6
DIFF: https://github.com/llvm/llvm-project/commit/bd4ff65a601895ba816623cddb36ce466cceabe6.diff

LOG: Revert "[LoongArch] Eliminate the redundant sign extension of division (#107971)"

This reverts commit d752f29fb333d47724484e08b32d6499cc1e460e.

Added: 
    

Modified: 
    llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp b/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
index ab90409fdf47d0..abac69054f3b91 100644
--- a/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
+++ b/llvm/lib/Target/LoongArch/LoongArchOptWInstrs.cpp
@@ -637,19 +637,6 @@ static bool isSignExtendedW(Register SrcReg, const LoongArchSubtarget &ST,
         break;
       }
       return false;
-    // If all incoming values are sign-extended and all users only use
-    // the lower 32 bits, then convert them to W versions.
-    case LoongArch::DIV_D: {
-      if (!AddRegToWorkList(MI->getOperand(1).getReg()))
-        return false;
-      if (!AddRegToWorkList(MI->getOperand(2).getReg()))
-        return false;
-      if (hasAllWUsers(*MI, ST, MRI)) {
-        FixableDef.insert(MI);
-        break;
-      }
-      return false;
-    }
     }
   }
 
@@ -664,8 +651,6 @@ static unsigned getWOp(unsigned Opcode) {
     return LoongArch::ADDI_W;
   case LoongArch::ADD_D:
     return LoongArch::ADD_W;
-  case LoongArch::DIV_D:
-    return LoongArch::DIV_W;
   case LoongArch::LD_D:
   case LoongArch::LD_WU:
     return LoongArch::LD_W;