[llvm-branch-commits] [llvm] release/19.x: [RISCV] Don't delete all fixups in RISCVMCCodeEmitter::expandLongCondBr. (#109513) (PR #114089)
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Tue Oct 29 10:00:55 PDT 2024
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-risc-v
Author: None (llvmbot)
<details>
<summary>Changes</summary>
Backport c3d3cef8d58377b02032b07b5f094a402a70435a
Requested by: @<!-- -->topperc
---
Full diff: https://github.com/llvm/llvm-project/pull/114089.diff
2 Files Affected:
- (modified) llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp (+6-1)
- (modified) llvm/test/MC/RISCV/rv64-relax-all.s (+6)
``````````diff
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
index 0863345b0c6dc6..c9636b2c702508 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
@@ -283,13 +283,18 @@ void RISCVMCCodeEmitter::expandLongCondBr(const MCInst &MI,
Offset = 4;
}
+ // Save the number fixups.
+ size_t FixupStartIndex = Fixups.size();
+
// Emit an unconditional jump to the destination.
MCInst TmpInst =
MCInstBuilder(RISCV::JAL).addReg(RISCV::X0).addOperand(SrcSymbol);
uint32_t Binary = getBinaryCodeForInstr(TmpInst, Fixups, STI);
support::endian::write(CB, Binary, llvm::endianness::little);
- Fixups.clear();
+ // Drop any fixup added so we can add the correct one.
+ Fixups.resize(FixupStartIndex);
+
if (SrcSymbol.isExpr()) {
Fixups.push_back(MCFixup::create(Offset, SrcSymbol.getExpr(),
MCFixupKind(RISCV::fixup_riscv_jal),
diff --git a/llvm/test/MC/RISCV/rv64-relax-all.s b/llvm/test/MC/RISCV/rv64-relax-all.s
index 70a3f77540c997..6705d6ecfb5b62 100644
--- a/llvm/test/MC/RISCV/rv64-relax-all.s
+++ b/llvm/test/MC/RISCV/rv64-relax-all.s
@@ -14,3 +14,9 @@ c.beqz a0, NEAR
# INSTR: c.j 0x0 <NEAR>
# RELAX-INSTR: jal zero, 0x0 <NEAR>
c.j NEAR
+
+bnez s0, .foo
+j .foo
+beqz s0, .foo
+.foo:
+ret
``````````
</details>
https://github.com/llvm/llvm-project/pull/114089
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