[llvm-branch-commits] [llvm] [AMDGPU] Still set up the two SGPRs for queue ptr even it is COV5 (PR #112403)

[Shilei Tian via llvm-branch-commits]

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@@ -4,12 +4,12 @@
 define amdgpu_kernel void @s_clear_msb(ptr addrspace(1) %out, i32 %in) {
 ; SI-LABEL: s_clear_msb:
 ; SI:       ; %bb.0:
-; SI-NEXT:    s_load_dword s4, s[2:3], 0xb
-; SI-NEXT:    s_load_dwordx2 s[0:1], s[2:3], 0x9
+; SI-NEXT:    s_load_dword s6, s[4:5], 0xb
+; SI-NEXT:    s_load_dwordx2 s[0:1], s[4:5], 0x9
 ; SI-NEXT:    s_mov_b32 s3, 0xf000
 ; SI-NEXT:    s_mov_b32 s2, -1
 ; SI-NEXT:    s_waitcnt lgkmcnt(0)
-; SI-NEXT:    s_bitset0_b32 s4, 31
+; SI-NEXT:    s_and_b32 s4, s6, 0x7fffffff
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shiltian wrote:

Okay, then I guess we can just leave as it is for now.

https://github.com/llvm/llvm-project/pull/112403