[llvm-branch-commits] [llvm] [NewPM][CodeGen] Port LiveRegMatrix to NPM (PR #109938)
Akshat Oke via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Oct 13 22:44:54 PDT 2024
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/109938
>From d4cc049c53df27919103625417730595fc2183d7 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Tue, 24 Sep 2024 09:07:04 +0000
Subject: [PATCH 1/4] [NewPM][CodeGen] Port LiveRegMatrix to NPM
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 50 ++++++++++++++++---
llvm/include/llvm/InitializePasses.h | 2 +-
.../llvm/Passes/MachinePassRegistry.def | 4 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 38 ++++++++++----
llvm/lib/CodeGen/RegAllocBasic.cpp | 8 +--
llvm/lib/CodeGen/RegAllocGreedy.cpp | 8 +--
llvm/lib/Passes/PassBuilder.cpp | 1 +
llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 6 +--
.../Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 6 +--
9 files changed, 88 insertions(+), 35 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index 2b32308c7c075e..c024ca9c1dc38d 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -37,7 +37,9 @@ class MachineFunction;
class TargetRegisterInfo;
class VirtRegMap;
-class LiveRegMatrix : public MachineFunctionPass {
+class LiveRegMatrix {
+ friend class LiveRegMatrixWrapperPass;
+ friend class LiveRegMatrixAnalysis;
const TargetRegisterInfo *TRI = nullptr;
LiveIntervals *LIS = nullptr;
VirtRegMap *VRM = nullptr;
@@ -57,15 +59,21 @@ class LiveRegMatrix : public MachineFunctionPass {
unsigned RegMaskVirtReg = 0;
BitVector RegMaskUsable;
- // MachineFunctionPass boilerplate.
- void getAnalysisUsage(AnalysisUsage &) const override;
- bool runOnMachineFunction(MachineFunction &) override;
- void releaseMemory() override;
+ LiveRegMatrix() = default;
+ void releaseMemory();
public:
- static char ID;
-
- LiveRegMatrix();
+ LiveRegMatrix(LiveRegMatrix &&Other)
+ : TRI(Other.TRI), LIS(Other.LIS), VRM(Other.VRM), UserTag(Other.UserTag),
+ Matrix(std::move(Other.Matrix)), Queries(std::move(Other.Queries)),
+ RegMaskTag(Other.RegMaskTag), RegMaskVirtReg(Other.RegMaskVirtReg),
+ RegMaskUsable(std::move(Other.RegMaskUsable)) {
+ Other.TRI = nullptr;
+ Other.LIS = nullptr;
+ Other.VRM = nullptr;
+ }
+
+ void init(MachineFunction &MF, LiveIntervals *LIS, VirtRegMap *VRM);
//===--------------------------------------------------------------------===//
// High-level interface.
@@ -159,6 +167,32 @@ class LiveRegMatrix : public MachineFunctionPass {
Register getOneVReg(unsigned PhysReg) const;
};
+class LiveRegMatrixWrapperPass : public MachineFunctionPass {
+ LiveRegMatrix LRM;
+
+public:
+ static char ID;
+
+ LiveRegMatrixWrapperPass() : MachineFunctionPass(ID) {}
+
+ LiveRegMatrix &getLRM() { return LRM; }
+ const LiveRegMatrix &getLRM() const { return LRM; }
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override;
+ bool runOnMachineFunction(MachineFunction &MF) override;
+ void releaseMemory() override;
+};
+
+class LiveRegMatrixAnalysis : public AnalysisInfoMixin<LiveRegMatrixAnalysis> {
+ friend AnalysisInfoMixin<LiveRegMatrixAnalysis>;
+ static AnalysisKey Key;
+
+public:
+ using Result = LiveRegMatrix;
+
+ LiveRegMatrix run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
+};
+
} // end namespace llvm
#endif // LLVM_CODEGEN_LIVEREGMATRIX_H
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index d89a5538b46975..3fee8c40a6607e 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -156,7 +156,7 @@ void initializeLiveDebugValuesPass(PassRegistry &);
void initializeLiveDebugVariablesPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
-void initializeLiveRegMatrixPass(PassRegistry &);
+void initializeLiveRegMatrixWrapperPassPass(PassRegistry &);
void initializeLiveStacksPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index bdc56ca03f392a..4497c1fce0db69 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -97,6 +97,7 @@ LOOP_PASS("loop-term-fold", LoopTermFoldPass())
// preferably fix the scavenger to not depend on them).
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
+MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-block-freq", MachineBlockFrequencyAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
MachineBranchProbabilityAnalysis())
@@ -122,8 +123,7 @@ MACHINE_FUNCTION_ANALYSIS("virtregmap", VirtRegMapAnalysis())
// MachineRegionInfoPassAnalysis())
// MACHINE_FUNCTION_ANALYSIS("machine-trace-metrics",
// MachineTraceMetricsAnalysis()) MACHINE_FUNCTION_ANALYSIS("reaching-def",
-// ReachingDefAnalysisAnalysis()) MACHINE_FUNCTION_ANALYSIS("live-reg-matrix",
-// LiveRegMatrixAnalysis()) MACHINE_FUNCTION_ANALYSIS("gc-analysis",
+// ReachingDefAnalysisAnalysis()) MACHINE_FUNCTION_ANALYSIS("gc-analysis",
// GCMachineCodeAnalysisPass())
#undef MACHINE_FUNCTION_ANALYSIS
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index a0e8b0e4f9cc1d..904d7e103267fe 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -35,27 +35,33 @@ using namespace llvm;
STATISTIC(NumAssigned , "Number of registers assigned");
STATISTIC(NumUnassigned , "Number of registers unassigned");
-char LiveRegMatrix::ID = 0;
-INITIALIZE_PASS_BEGIN(LiveRegMatrix, "liveregmatrix",
+char LiveRegMatrixWrapperPass::ID = 0;
+INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperPass, "liveregmatrix",
"Live Register Matrix", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_END(LiveRegMatrix, "liveregmatrix",
+INITIALIZE_PASS_END(LiveRegMatrixWrapperPass, "liveregmatrix",
"Live Register Matrix", false, false)
-LiveRegMatrix::LiveRegMatrix() : MachineFunctionPass(ID) {}
-
-void LiveRegMatrix::getAnalysisUsage(AnalysisUsage &AU) const {
+void LiveRegMatrixWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequiredTransitive<LiveIntervalsWrapperPass>();
AU.addRequiredTransitive<VirtRegMapWrapperLegacy>();
MachineFunctionPass::getAnalysisUsage(AU);
}
-bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
+bool LiveRegMatrixWrapperPass::runOnMachineFunction(MachineFunction &MF) {
+ auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
+ auto *VRM = &getAnalysis<VirtRegMapWrapperPass>().getVRM();
+ LRM.init(MF, LIS, VRM);
+ return false;
+}
+
+void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals *pLIS,
+ VirtRegMap *pVRM) {
TRI = MF.getSubtarget().getRegisterInfo();
- LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
+ LIS = pLIS;
+ VRM = pVRM;
unsigned NumRegUnits = TRI->getNumRegUnits();
if (NumRegUnits != Matrix.size())
@@ -64,9 +70,10 @@ bool LiveRegMatrix::runOnMachineFunction(MachineFunction &MF) {
// Make sure no stale queries get reused.
invalidateVirtRegs();
- return false;
}
+void LiveRegMatrixWrapperPass::releaseMemory() { LRM.releaseMemory(); }
+
void LiveRegMatrix::releaseMemory() {
for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
Matrix[i].clear();
@@ -246,3 +253,14 @@ Register LiveRegMatrix::getOneVReg(unsigned PhysReg) const {
return MCRegister::NoRegister;
}
+
+AnalysisKey LiveRegMatrixAnalysis::Key;
+
+LiveRegMatrix LiveRegMatrixAnalysis::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ auto &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
+ auto &VRM = MFAM.getResult<VirtRegMapAnalysis>(MF);
+ LiveRegMatrix LRM;
+ LRM.init(MF, &LIS, &VRM);
+ return LRM;
+}
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index 4a9d9fe8c13b3f..e0adddb0991d63 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -139,7 +139,7 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_END(RABasic, "regallocbasic", "Basic Register Allocator", false,
false)
@@ -190,8 +190,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
AU.addPreserved<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrix>();
- AU.addPreserved<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
+ AU.addPreserved<LiveRegMatrixWrapperPass>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -309,7 +309,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
- getAnalysis<LiveRegMatrix>());
+ getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
VirtRegAuxInfo VRAI(
*MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index 2c9bb0aa145577..d00edcbec37399 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -163,7 +163,7 @@ INITIALIZE_PASS_DEPENDENCY(LiveStacks)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
INITIALIZE_PASS_DEPENDENCY(SpillPlacement)
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
@@ -217,8 +217,8 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
AU.addPreserved<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrix>();
- AU.addPreserved<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
+ AU.addPreserved<LiveRegMatrixWrapperPass>();
AU.addRequired<EdgeBundles>();
AU.addRequired<SpillPlacement>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
@@ -2718,7 +2718,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
- getAnalysis<LiveRegMatrix>());
+ getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
// Early return if there is no virtual register to be allocated to a
// physical register.
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index 8680643fc0f327..67fc117637fb73 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -94,6 +94,7 @@
#include "llvm/CodeGen/InterleavedLoadCombine.h"
#include "llvm/CodeGen/JMCInstrumenter.h"
#include "llvm/CodeGen/LiveIntervals.h"
+#include "llvm/CodeGen/LiveRegMatrix.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/CodeGen/LocalStackSlotAllocation.h"
#include "llvm/CodeGen/LowerEmuTLS.h"
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
index 40af37141fe61c..2bd0fabef65bfa 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
@@ -50,7 +50,7 @@ class GCNNSAReassign : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -96,7 +96,7 @@ INITIALIZE_PASS_BEGIN(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_END(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
false, false)
@@ -243,7 +243,7 @@ bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
TRI = ST->getRegisterInfo();
VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
- LRM = &getAnalysis<LiveRegMatrix>();
+ LRM = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
diff --git a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
index 9f16b25c5436ed..371127fdf3eee5 100644
--- a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
@@ -61,7 +61,7 @@ class SIPreAllocateWWMRegs : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrix>();
+ AU.addRequired<LiveRegMatrixWrapperPass>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -77,7 +77,7 @@ INITIALIZE_PASS_BEGIN(SIPreAllocateWWMRegs, DEBUG_TYPE,
"SI Pre-allocate WWM Registers", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrix)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
INITIALIZE_PASS_END(SIPreAllocateWWMRegs, DEBUG_TYPE,
"SI Pre-allocate WWM Registers", false, false)
@@ -194,7 +194,7 @@ bool SIPreAllocateWWMRegs::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- Matrix = &getAnalysis<LiveRegMatrix>();
+ Matrix = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
RegClassInfo.runOnMachineFunction(MF);
>From 0bea40fddd4e0a4274bf5ee75a2800fcbedbca9e Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Mon, 7 Oct 2024 09:03:54 +0000
Subject: [PATCH 2/4] Change analysis params to refs
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 8 ++------
llvm/lib/CodeGen/LiveRegMatrix.cpp | 14 +++++++-------
2 files changed, 9 insertions(+), 13 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index c024ca9c1dc38d..65b45dbd7f31fb 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -67,13 +67,9 @@ class LiveRegMatrix {
: TRI(Other.TRI), LIS(Other.LIS), VRM(Other.VRM), UserTag(Other.UserTag),
Matrix(std::move(Other.Matrix)), Queries(std::move(Other.Queries)),
RegMaskTag(Other.RegMaskTag), RegMaskVirtReg(Other.RegMaskVirtReg),
- RegMaskUsable(std::move(Other.RegMaskUsable)) {
- Other.TRI = nullptr;
- Other.LIS = nullptr;
- Other.VRM = nullptr;
- }
+ RegMaskUsable(std::move(Other.RegMaskUsable)) {}
- void init(MachineFunction &MF, LiveIntervals *LIS, VirtRegMap *VRM);
+ void init(MachineFunction &MF, LiveIntervals &LIS, VirtRegMap &VRM);
//===--------------------------------------------------------------------===//
// High-level interface.
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index 904d7e103267fe..483cf947c61d30 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -51,17 +51,17 @@ void LiveRegMatrixWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
}
bool LiveRegMatrixWrapperPass::runOnMachineFunction(MachineFunction &MF) {
- auto *LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- auto *VRM = &getAnalysis<VirtRegMapWrapperPass>().getVRM();
+ auto &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
+ auto &VRM = getAnalysis<VirtRegMapWrapperPass>().getVRM();
LRM.init(MF, LIS, VRM);
return false;
}
-void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals *pLIS,
- VirtRegMap *pVRM) {
+void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals &pLIS,
+ VirtRegMap &pVRM) {
TRI = MF.getSubtarget().getRegisterInfo();
- LIS = pLIS;
- VRM = pVRM;
+ LIS = &pLIS;
+ VRM = &pVRM;
unsigned NumRegUnits = TRI->getNumRegUnits();
if (NumRegUnits != Matrix.size())
@@ -261,6 +261,6 @@ LiveRegMatrix LiveRegMatrixAnalysis::run(MachineFunction &MF,
auto &LIS = MFAM.getResult<LiveIntervalsAnalysis>(MF);
auto &VRM = MFAM.getResult<VirtRegMapAnalysis>(MF);
LiveRegMatrix LRM;
- LRM.init(MF, &LIS, &VRM);
+ LRM.init(MF, LIS, VRM);
return LRM;
}
>From a6cdd80af550055cd708479e0749d7bd2b4b3a30 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Mon, 7 Oct 2024 09:56:03 +0000
Subject: [PATCH 3/4] Rename to VirtRegMapWrapperLegacy
---
llvm/lib/CodeGen/LiveRegMatrix.cpp | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index 483cf947c61d30..2d8be9149c9bbf 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -52,7 +52,7 @@ void LiveRegMatrixWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
bool LiveRegMatrixWrapperPass::runOnMachineFunction(MachineFunction &MF) {
auto &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- auto &VRM = getAnalysis<VirtRegMapWrapperPass>().getVRM();
+ auto &VRM = getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
LRM.init(MF, LIS, VRM);
return false;
}
>From ce5cb6098d86605605c33e6658d6d8f1e3df155d Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Mon, 7 Oct 2024 10:06:50 +0000
Subject: [PATCH 4/4] Rename to *Legacy
---
llvm/include/llvm/CodeGen/LiveRegMatrix.h | 6 +++---
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/include/llvm/Passes/MachinePassRegistry.def | 2 +-
llvm/lib/CodeGen/LiveRegMatrix.cpp | 12 ++++++------
llvm/lib/CodeGen/RegAllocBasic.cpp | 8 ++++----
llvm/lib/CodeGen/RegAllocGreedy.cpp | 8 ++++----
llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp | 6 +++---
llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp | 6 +++---
8 files changed, 25 insertions(+), 25 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/LiveRegMatrix.h b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
index 65b45dbd7f31fb..84050bf1707377 100644
--- a/llvm/include/llvm/CodeGen/LiveRegMatrix.h
+++ b/llvm/include/llvm/CodeGen/LiveRegMatrix.h
@@ -38,7 +38,7 @@ class TargetRegisterInfo;
class VirtRegMap;
class LiveRegMatrix {
- friend class LiveRegMatrixWrapperPass;
+ friend class LiveRegMatrixWrapperLegacy;
friend class LiveRegMatrixAnalysis;
const TargetRegisterInfo *TRI = nullptr;
LiveIntervals *LIS = nullptr;
@@ -163,13 +163,13 @@ class LiveRegMatrix {
Register getOneVReg(unsigned PhysReg) const;
};
-class LiveRegMatrixWrapperPass : public MachineFunctionPass {
+class LiveRegMatrixWrapperLegacy : public MachineFunctionPass {
LiveRegMatrix LRM;
public:
static char ID;
- LiveRegMatrixWrapperPass() : MachineFunctionPass(ID) {}
+ LiveRegMatrixWrapperLegacy() : MachineFunctionPass(ID) {}
LiveRegMatrix &getLRM() { return LRM; }
const LiveRegMatrix &getLRM() const { return LRM; }
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index 3fee8c40a6607e..327dad99de7531 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -156,7 +156,7 @@ void initializeLiveDebugValuesPass(PassRegistry &);
void initializeLiveDebugVariablesPass(PassRegistry &);
void initializeLiveIntervalsWrapperPassPass(PassRegistry &);
void initializeLiveRangeShrinkPass(PassRegistry &);
-void initializeLiveRegMatrixWrapperPassPass(PassRegistry &);
+void initializeLiveRegMatrixWrapperLegacyPass(PassRegistry &);
void initializeLiveStacksPass(PassRegistry &);
void initializeLiveVariablesWrapperPassPass(PassRegistry &);
void initializeLoadStoreOptPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index 4497c1fce0db69..654ffa19a8f11f 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -96,8 +96,8 @@ LOOP_PASS("loop-term-fold", LoopTermFoldPass())
// computed. (We still either need to regenerate kill flags after regalloc, or
// preferably fix the scavenger to not depend on them).
MACHINE_FUNCTION_ANALYSIS("live-intervals", LiveIntervalsAnalysis())
-MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
MACHINE_FUNCTION_ANALYSIS("live-reg-matrix", LiveRegMatrixAnalysis())
+MACHINE_FUNCTION_ANALYSIS("live-vars", LiveVariablesAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-block-freq", MachineBlockFrequencyAnalysis())
MACHINE_FUNCTION_ANALYSIS("machine-branch-prob",
MachineBranchProbabilityAnalysis())
diff --git a/llvm/lib/CodeGen/LiveRegMatrix.cpp b/llvm/lib/CodeGen/LiveRegMatrix.cpp
index 2d8be9149c9bbf..a57233cf37da01 100644
--- a/llvm/lib/CodeGen/LiveRegMatrix.cpp
+++ b/llvm/lib/CodeGen/LiveRegMatrix.cpp
@@ -35,22 +35,22 @@ using namespace llvm;
STATISTIC(NumAssigned , "Number of registers assigned");
STATISTIC(NumUnassigned , "Number of registers unassigned");
-char LiveRegMatrixWrapperPass::ID = 0;
-INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperPass, "liveregmatrix",
+char LiveRegMatrixWrapperLegacy::ID = 0;
+INITIALIZE_PASS_BEGIN(LiveRegMatrixWrapperLegacy, "liveregmatrix",
"Live Register Matrix", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_END(LiveRegMatrixWrapperPass, "liveregmatrix",
+INITIALIZE_PASS_END(LiveRegMatrixWrapperLegacy, "liveregmatrix",
"Live Register Matrix", false, false)
-void LiveRegMatrixWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
+void LiveRegMatrixWrapperLegacy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
AU.addRequiredTransitive<LiveIntervalsWrapperPass>();
AU.addRequiredTransitive<VirtRegMapWrapperLegacy>();
MachineFunctionPass::getAnalysisUsage(AU);
}
-bool LiveRegMatrixWrapperPass::runOnMachineFunction(MachineFunction &MF) {
+bool LiveRegMatrixWrapperLegacy::runOnMachineFunction(MachineFunction &MF) {
auto &LIS = getAnalysis<LiveIntervalsWrapperPass>().getLIS();
auto &VRM = getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
LRM.init(MF, LIS, VRM);
@@ -72,7 +72,7 @@ void LiveRegMatrix::init(MachineFunction &MF, LiveIntervals &pLIS,
invalidateVirtRegs();
}
-void LiveRegMatrixWrapperPass::releaseMemory() { LRM.releaseMemory(); }
+void LiveRegMatrixWrapperLegacy::releaseMemory() { LRM.releaseMemory(); }
void LiveRegMatrix::releaseMemory() {
for (unsigned i = 0, e = Matrix.size(); i != e; ++i) {
diff --git a/llvm/lib/CodeGen/RegAllocBasic.cpp b/llvm/lib/CodeGen/RegAllocBasic.cpp
index e0adddb0991d63..3e49be45bd03a8 100644
--- a/llvm/lib/CodeGen/RegAllocBasic.cpp
+++ b/llvm/lib/CodeGen/RegAllocBasic.cpp
@@ -139,7 +139,7 @@ INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
INITIALIZE_PASS_END(RABasic, "regallocbasic", "Basic Register Allocator", false,
false)
@@ -190,8 +190,8 @@ void RABasic::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
AU.addPreserved<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrixWrapperPass>();
- AU.addPreserved<LiveRegMatrixWrapperPass>();
+ AU.addRequired<LiveRegMatrixWrapperLegacy>();
+ AU.addPreserved<LiveRegMatrixWrapperLegacy>();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -309,7 +309,7 @@ bool RABasic::runOnMachineFunction(MachineFunction &mf) {
MF = &mf;
RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
- getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
+ getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM());
VirtRegAuxInfo VRAI(
*MF, *LIS, *VRM, getAnalysis<MachineLoopInfoWrapperPass>().getLI(),
getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI());
diff --git a/llvm/lib/CodeGen/RegAllocGreedy.cpp b/llvm/lib/CodeGen/RegAllocGreedy.cpp
index d00edcbec37399..9cb596be96f991 100644
--- a/llvm/lib/CodeGen/RegAllocGreedy.cpp
+++ b/llvm/lib/CodeGen/RegAllocGreedy.cpp
@@ -163,7 +163,7 @@ INITIALIZE_PASS_DEPENDENCY(LiveStacks)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
INITIALIZE_PASS_DEPENDENCY(EdgeBundles)
INITIALIZE_PASS_DEPENDENCY(SpillPlacement)
INITIALIZE_PASS_DEPENDENCY(MachineOptimizationRemarkEmitterPass)
@@ -217,8 +217,8 @@ void RAGreedy::getAnalysisUsage(AnalysisUsage &AU) const {
AU.addPreserved<MachineLoopInfoWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
AU.addPreserved<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrixWrapperPass>();
- AU.addPreserved<LiveRegMatrixWrapperPass>();
+ AU.addRequired<LiveRegMatrixWrapperLegacy>();
+ AU.addPreserved<LiveRegMatrixWrapperLegacy>();
AU.addRequired<EdgeBundles>();
AU.addRequired<SpillPlacement>();
AU.addRequired<MachineOptimizationRemarkEmitterPass>();
@@ -2718,7 +2718,7 @@ bool RAGreedy::runOnMachineFunction(MachineFunction &mf) {
RegAllocBase::init(getAnalysis<VirtRegMapWrapperLegacy>().getVRM(),
getAnalysis<LiveIntervalsWrapperPass>().getLIS(),
- getAnalysis<LiveRegMatrixWrapperPass>().getLRM());
+ getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM());
// Early return if there is no virtual register to be allocated to a
// physical register.
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
index 2bd0fabef65bfa..85e79aa4b7595e 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
@@ -50,7 +50,7 @@ class GCNNSAReassign : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrixWrapperPass>();
+ AU.addRequired<LiveRegMatrixWrapperLegacy>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -96,7 +96,7 @@ INITIALIZE_PASS_BEGIN(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
INITIALIZE_PASS_END(GCNNSAReassign, DEBUG_TYPE, "GCN NSA Reassign",
false, false)
@@ -243,7 +243,7 @@ bool GCNNSAReassign::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
TRI = ST->getRegisterInfo();
VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
- LRM = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
+ LRM = &getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
diff --git a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
index 371127fdf3eee5..07303e2aa726c5 100644
--- a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
@@ -61,7 +61,7 @@ class SIPreAllocateWWMRegs : public MachineFunctionPass {
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<LiveIntervalsWrapperPass>();
AU.addRequired<VirtRegMapWrapperLegacy>();
- AU.addRequired<LiveRegMatrixWrapperPass>();
+ AU.addRequired<LiveRegMatrixWrapperLegacy>();
AU.setPreservesAll();
MachineFunctionPass::getAnalysisUsage(AU);
}
@@ -77,7 +77,7 @@ INITIALIZE_PASS_BEGIN(SIPreAllocateWWMRegs, DEBUG_TYPE,
"SI Pre-allocate WWM Registers", false, false)
INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass)
INITIALIZE_PASS_DEPENDENCY(VirtRegMapWrapperLegacy)
-INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperPass)
+INITIALIZE_PASS_DEPENDENCY(LiveRegMatrixWrapperLegacy)
INITIALIZE_PASS_END(SIPreAllocateWWMRegs, DEBUG_TYPE,
"SI Pre-allocate WWM Registers", false, false)
@@ -194,7 +194,7 @@ bool SIPreAllocateWWMRegs::runOnMachineFunction(MachineFunction &MF) {
MRI = &MF.getRegInfo();
LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS();
- Matrix = &getAnalysis<LiveRegMatrixWrapperPass>().getLRM();
+ Matrix = &getAnalysis<LiveRegMatrixWrapperLegacy>().getLRM();
VRM = &getAnalysis<VirtRegMapWrapperLegacy>().getVRM();
RegClassInfo.runOnMachineFunction(MF);
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