[llvm-branch-commits] [llvm] [CodeGen][NewPM] Port MachineSink to NPM (PR #115434)
Akshat Oke via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Thu Nov 14 03:54:26 PST 2024
https://github.com/optimisan updated https://github.com/llvm/llvm-project/pull/115434
>From 8768c042fe8495c6de844b04a2c4f479fbcf5a14 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Wed, 30 Oct 2024 04:56:54 +0000
Subject: [PATCH 1/3] [CodeGen][NewPM] Port MachineSink to NPM
Targets can set the EnableSinkAndFold option in CGPassBuilderOptions for
the NPM pipeline in buildCodeGenPipeline(... &Opts, ...)
---
llvm/include/llvm/CodeGen/MachineSink.h | 26 ++++
llvm/include/llvm/CodeGen/Passes.h | 2 +-
llvm/include/llvm/InitializePasses.h | 2 +-
llvm/include/llvm/Passes/CodeGenPassBuilder.h | 3 +-
.../llvm/Passes/MachinePassRegistry.def | 9 +-
.../include/llvm/Target/CGPassBuilderOption.h | 1 +
llvm/lib/CodeGen/CodeGen.cpp | 2 +-
llvm/lib/CodeGen/MachineSink.cpp | 133 ++++++++++++------
llvm/lib/CodeGen/TargetPassConfig.cpp | 4 +-
llvm/lib/Passes/PassBuilder.cpp | 6 +
llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp | 2 +-
llvm/test/CodeGen/AArch64/loop-sink.mir | 1 +
.../sink-and-fold-preserve-debugloc.mir | 2 +
...e-sink-temporal-divergence-swdev407790.mir | 2 +
.../CodeGen/ARM/machine-sink-multidef.mir | 2 +
.../Hexagon/machine-sink-float-usr.mir | 2 +
.../PowerPC/sink-down-more-instructions-1.mir | 2 +
.../CodeGen/RISCV/MachineSink-implicit-x0.mir | 1 +
.../CodeGen/SystemZ/machinesink-dead-cc.mir | 3 +
.../CodeGen/X86/machinesink-debug-inv-0.mir | 3 +
.../DebugInfo/MIR/X86/sink-leaves-undef.mir | 1 +
21 files changed, 160 insertions(+), 49 deletions(-)
create mode 100644 llvm/include/llvm/CodeGen/MachineSink.h
diff --git a/llvm/include/llvm/CodeGen/MachineSink.h b/llvm/include/llvm/CodeGen/MachineSink.h
new file mode 100644
index 00000000000000..b5bb59619c0474
--- /dev/null
+++ b/llvm/include/llvm/CodeGen/MachineSink.h
@@ -0,0 +1,26 @@
+//===- MachineSink.h --------------------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CODEGEN_MACHINESINK_H
+#define LLVM_CODEGEN_MACHINESINK_H
+
+#include "llvm/CodeGen/MachinePassManager.h"
+
+namespace llvm {
+
+class MachineSinkingPass : public PassInfoMixin<MachineSinkingPass> {
+ bool EnableSinkAndFold;
+
+public:
+ MachineSinkingPass(bool EnableSinkAndFold = false)
+ : EnableSinkAndFold(EnableSinkAndFold) {}
+ PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+};
+
+} // namespace llvm
+#endif // LLVM_CODEGEN_MACHINESINK_H
diff --git a/llvm/include/llvm/CodeGen/Passes.h b/llvm/include/llvm/CodeGen/Passes.h
index 708ff464b38093..33a99483e73a33 100644
--- a/llvm/include/llvm/CodeGen/Passes.h
+++ b/llvm/include/llvm/CodeGen/Passes.h
@@ -349,7 +349,7 @@ namespace llvm {
extern char &EarlyMachineLICMID;
/// MachineSinking - This pass performs sinking on machine instructions.
- extern char &MachineSinkingID;
+ extern char &MachineSinkingLegacyID;
/// MachineCopyPropagation - This pass performs copy propagation on
/// machine instructions.
diff --git a/llvm/include/llvm/InitializePasses.h b/llvm/include/llvm/InitializePasses.h
index a2738e4d6c1217..31b84a1b665016 100644
--- a/llvm/include/llvm/InitializePasses.h
+++ b/llvm/include/llvm/InitializePasses.h
@@ -209,7 +209,7 @@ void initializeMachinePostDominatorTreeWrapperPassPass(PassRegistry &);
void initializeMachineRegionInfoPassPass(PassRegistry &);
void initializeMachineSanitizerBinaryMetadataPass(PassRegistry &);
void initializeMachineSchedulerPass(PassRegistry &);
-void initializeMachineSinkingPass(PassRegistry &);
+void initializeMachineSinkingLegacyPass(PassRegistry &);
void initializeMachineTraceMetricsWrapperPassPass(PassRegistry &);
void initializeMachineUniformityInfoPrinterPassPass(PassRegistry &);
void initializeMachineUniformityAnalysisPassPass(PassRegistry &);
diff --git a/llvm/include/llvm/Passes/CodeGenPassBuilder.h b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
index 3f7d226c7cbffb..8b1a4ff8f43697 100644
--- a/llvm/include/llvm/Passes/CodeGenPassBuilder.h
+++ b/llvm/include/llvm/Passes/CodeGenPassBuilder.h
@@ -49,6 +49,7 @@
#include "llvm/CodeGen/MachineLICM.h"
#include "llvm/CodeGen/MachineModuleInfo.h"
#include "llvm/CodeGen/MachinePassManager.h"
+#include "llvm/CodeGen/MachineSink.h"
#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/CodeGen/OptimizePHIs.h"
#include "llvm/CodeGen/PHIElimination.h"
@@ -1032,7 +1033,7 @@ void CodeGenPassBuilder<Derived, TargetMachineT>::addMachineSSAOptimization(
addPass(EarlyMachineLICMPass());
addPass(MachineCSEPass());
- addPass(MachineSinkingPass());
+ addPass(MachineSinkingPass(Opt.EnableSinkAndFold));
addPass(PeepholeOptimizerPass());
// Clean-up the dead code that may have been generated by peephole
diff --git a/llvm/include/llvm/Passes/MachinePassRegistry.def b/llvm/include/llvm/Passes/MachinePassRegistry.def
index ae8251dc1dab5d..805bf40270d759 100644
--- a/llvm/include/llvm/Passes/MachinePassRegistry.def
+++ b/llvm/include/llvm/Passes/MachinePassRegistry.def
@@ -172,6 +172,13 @@ MACHINE_FUNCTION_PASS("verify<machine-trace-metrics>", MachineTraceMetricsVerifi
#define MACHINE_FUNCTION_PASS_WITH_PARAMS(NAME, CLASS, CREATE_PASS, PARSER, \
PARAMS)
#endif
+MACHINE_FUNCTION_PASS_WITH_PARAMS(
+ "machine-sink", "MachineSinkingPass",
+ [](bool EnableSinkAndFold) {
+ return MachineSinkingPass(EnableSinkAndFold);
+ },
+ parseMachineSinkingPassOptions, "enable-sink-fold")
+
MACHINE_FUNCTION_PASS_WITH_PARAMS(
"regallocfast", "RegAllocFast",
[](RegAllocFastPassOptions Opts) { return RegAllocFastPass(Opts); },
@@ -179,6 +186,7 @@ MACHINE_FUNCTION_PASS_WITH_PARAMS(
return parseRegAllocFastPassOptions(*PB, Params);
},
"filter=reg-filter;no-clear-vregs")
+
#undef MACHINE_FUNCTION_PASS_WITH_PARAMS
// After a pass is converted to new pass manager, its entry should be moved from
@@ -234,7 +242,6 @@ DUMMY_MACHINE_FUNCTION_PASS("machine-function-splitter", MachineFunctionSplitter
DUMMY_MACHINE_FUNCTION_PASS("machine-latecleanup", MachineLateInstrsCleanupPass)
DUMMY_MACHINE_FUNCTION_PASS("machine-sanmd", MachineSanitizerBinaryMetadata)
DUMMY_MACHINE_FUNCTION_PASS("machine-scheduler", MachineSchedulerPass)
-DUMMY_MACHINE_FUNCTION_PASS("machine-sink", MachineSinkingPass)
DUMMY_MACHINE_FUNCTION_PASS("machine-uniformity", MachineUniformityInfoWrapperPass)
DUMMY_MACHINE_FUNCTION_PASS("machineinstr-printer", MachineFunctionPrinterPass)
DUMMY_MACHINE_FUNCTION_PASS("mirfs-discriminators", MIRAddFSDiscriminatorsPass)
diff --git a/llvm/include/llvm/Target/CGPassBuilderOption.h b/llvm/include/llvm/Target/CGPassBuilderOption.h
index 29bdb9c1746d3c..3c9bfcfa7ca276 100644
--- a/llvm/include/llvm/Target/CGPassBuilderOption.h
+++ b/llvm/include/llvm/Target/CGPassBuilderOption.h
@@ -33,6 +33,7 @@ struct CGPassBuilderOption {
bool EnableBlockPlacementStats = false;
bool EnableGlobalMergeFunc = false;
bool EnableMachineFunctionSplitter = false;
+ bool EnableSinkAndFold = false;
bool MISchedPostRA = false;
bool EarlyLiveIntervals = false;
bool GCEmptyBlocks = false;
diff --git a/llvm/lib/CodeGen/CodeGen.cpp b/llvm/lib/CodeGen/CodeGen.cpp
index adddb8daaa0e91..b6881c339ff15e 100644
--- a/llvm/lib/CodeGen/CodeGen.cpp
+++ b/llvm/lib/CodeGen/CodeGen.cpp
@@ -94,7 +94,7 @@ void llvm::initializeCodeGen(PassRegistry &Registry) {
initializeMachinePostDominatorTreeWrapperPassPass(Registry);
initializeMachineRegionInfoPassPass(Registry);
initializeMachineSchedulerPass(Registry);
- initializeMachineSinkingPass(Registry);
+ initializeMachineSinkingLegacyPass(Registry);
initializeMachineUniformityAnalysisPassPass(Registry);
initializeMachineUniformityInfoPrinterPassPass(Registry);
initializeMachineVerifierLegacyPassPass(Registry);
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index c470bd71dfb29f..c1de925c8b1ac0 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -15,6 +15,7 @@
//
//===----------------------------------------------------------------------===//
+#include "llvm/CodeGen/MachineSink.h"
#include "llvm/ADT/DenseSet.h"
#include "llvm/ADT/DepthFirstIterator.h"
#include "llvm/ADT/MapVector.h"
@@ -36,6 +37,7 @@
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineOperand.h"
+#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/MachineSizeOpts.h"
@@ -45,6 +47,7 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/CodeGen/TargetRegisterInfo.h"
#include "llvm/CodeGen/TargetSubtargetInfo.h"
+#include "llvm/IR/Analysis.h"
#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/DebugInfoMetadata.h"
#include "llvm/IR/LLVMContext.h"
@@ -114,7 +117,7 @@ STATISTIC(NumPostRACopySink, "Number of copies sunk after RA");
namespace {
-class MachineSinking : public MachineFunctionPass {
+class MachineSinking {
const TargetSubtargetInfo *STI = nullptr;
const TargetInstrInfo *TII = nullptr;
const TargetRegisterInfo *TRI = nullptr;
@@ -127,6 +130,8 @@ class MachineSinking : public MachineFunctionPass {
const MachineBranchProbabilityInfo *MBPI = nullptr;
AliasAnalysis *AA = nullptr;
RegisterClassInfo RegClassInfo;
+ Pass *LegacyPass;
+ MachineFunctionAnalysisManager *MFAM;
// Remember which edges have been considered for breaking.
SmallSet<std::pair<MachineBasicBlock *, MachineBasicBlock *>, 8>
@@ -182,30 +187,14 @@ class MachineSinking : public MachineFunctionPass {
bool EnableSinkAndFold;
public:
- static char ID; // Pass identification
+ MachineSinking(Pass *LegacyPass, MachineFunctionAnalysisManager *MFAM,
+ bool EnableSinkAndFold)
+ : LegacyPass(LegacyPass), MFAM(MFAM),
+ EnableSinkAndFold(EnableSinkAndFold) {}
- MachineSinking() : MachineFunctionPass(ID) {
- initializeMachineSinkingPass(*PassRegistry::getPassRegistry());
- }
-
- bool runOnMachineFunction(MachineFunction &MF) override;
+ bool run(MachineFunction &MF);
- void getAnalysisUsage(AnalysisUsage &AU) const override {
- MachineFunctionPass::getAnalysisUsage(AU);
- AU.addRequired<AAResultsWrapperPass>();
- AU.addRequired<MachineDominatorTreeWrapperPass>();
- AU.addRequired<MachinePostDominatorTreeWrapperPass>();
- AU.addRequired<MachineCycleInfoWrapperPass>();
- AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
- AU.addPreserved<MachineCycleInfoWrapperPass>();
- AU.addPreserved<MachineLoopInfoWrapperPass>();
- AU.addRequired<ProfileSummaryInfoWrapperPass>();
- if (UseBlockFreqInfo)
- AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
- AU.addRequired<TargetPassConfig>();
- }
-
- void releaseMemory() override {
+ void releaseMemory() {
CEBCandidates.clear();
CEMergeCandidates.clear();
}
@@ -277,21 +266,47 @@ class MachineSinking : public MachineFunctionPass {
const MachineBasicBlock &MBB);
};
+class MachineSinkingLegacy : public MachineFunctionPass {
+public:
+ static char ID;
+
+ MachineSinkingLegacy() : MachineFunctionPass(ID) {
+ initializeMachineSinkingLegacyPass(*PassRegistry::getPassRegistry());
+ }
+
+ bool runOnMachineFunction(MachineFunction &MF) override;
+
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
+ MachineFunctionPass::getAnalysisUsage(AU);
+ AU.addRequired<AAResultsWrapperPass>();
+ AU.addRequired<MachineDominatorTreeWrapperPass>();
+ AU.addRequired<MachinePostDominatorTreeWrapperPass>();
+ AU.addRequired<MachineCycleInfoWrapperPass>();
+ AU.addRequired<MachineBranchProbabilityInfoWrapperPass>();
+ AU.addPreserved<MachineCycleInfoWrapperPass>();
+ AU.addPreserved<MachineLoopInfoWrapperPass>();
+ AU.addRequired<ProfileSummaryInfoWrapperPass>();
+ if (UseBlockFreqInfo)
+ AU.addRequired<MachineBlockFrequencyInfoWrapperPass>();
+ AU.addRequired<TargetPassConfig>();
+ }
+};
+
} // end anonymous namespace
-char MachineSinking::ID = 0;
+char MachineSinkingLegacy::ID = 0;
-char &llvm::MachineSinkingID = MachineSinking::ID;
+char &llvm::MachineSinkingLegacyID = MachineSinkingLegacy::ID;
-INITIALIZE_PASS_BEGIN(MachineSinking, DEBUG_TYPE, "Machine code sinking", false,
+INITIALIZE_PASS_BEGIN(MachineSinkingLegacy, DEBUG_TYPE, "Machine code sinking", false,
false)
INITIALIZE_PASS_DEPENDENCY(ProfileSummaryInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineCycleInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass)
-INITIALIZE_PASS_END(MachineSinking, DEBUG_TYPE, "Machine code sinking", false,
- false)
+INITIALIZE_PASS_END(MachineSinkingLegacy, DEBUG_TYPE, "Machine code sinking",
+ false, false)
/// Return true if a target defined block prologue instruction interferes
/// with a sink candidate.
@@ -711,28 +726,62 @@ void MachineSinking::FindCycleSinkCandidates(
}
}
-bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
+PreservedAnalyses
+MachineSinkingPass::run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM) {
+ if (MF.getFunction().hasOptNone())
+ return PreservedAnalyses::all();
+
+ MachineSinking Impl(nullptr, &MFAM, EnableSinkAndFold);
+ bool Changed = Impl.run(MF);
+ if (!Changed)
+ return PreservedAnalyses::all();
+ auto PA = getMachineFunctionPassPreservedAnalyses();
+ PA.preserve<MachineCycleAnalysis>();
+ PA.preserve<MachineLoopAnalysis>();
+ return PA;
+}
+
+bool MachineSinkingLegacy::runOnMachineFunction(MachineFunction &MF) {
if (skipFunction(MF.getFunction()))
return false;
+ TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
+ bool EnableSinkAndFold = PassConfig->getEnableSinkAndFold();
+
+ MachineSinking Impl(this, nullptr, EnableSinkAndFold);
+ return Impl.run(MF);
+}
+
+#define GET_ANALYSIS(ANALYSIS, INFIX, GETTER) \
+ ((LegacyPass) \
+ ? &LegacyPass->getAnalysis<ANALYSIS##INFIX##WrapperPass>().GETTER() \
+ : &MFAM->getResult<ANALYSIS##Analysis>(MF))
+
+bool MachineSinking::run(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "******** Machine Sinking ********\n");
STI = &MF.getSubtarget();
TII = STI->getInstrInfo();
TRI = STI->getRegisterInfo();
MRI = &MF.getRegInfo();
- DT = &getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- PDT = &getAnalysis<MachinePostDominatorTreeWrapperPass>().getPostDomTree();
- CI = &getAnalysis<MachineCycleInfoWrapperPass>().getCycleInfo();
- PSI = &getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI();
- MBFI = UseBlockFreqInfo
- ? &getAnalysis<MachineBlockFrequencyInfoWrapperPass>().getMBFI()
- : nullptr;
- MBPI = &getAnalysis<MachineBranchProbabilityInfoWrapperPass>().getMBPI();
- AA = &getAnalysis<AAResultsWrapperPass>().getAAResults();
+ DT = GET_ANALYSIS(MachineDominatorTree, , getDomTree);
+ PDT = GET_ANALYSIS(MachinePostDominatorTree, , getPostDomTree);
+ CI = GET_ANALYSIS(MachineCycle, Info, getCycleInfo);
+ PSI = (LegacyPass)
+ ? &LegacyPass->getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI()
+ : MFAM->getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
+ .getCachedResult<ProfileSummaryAnalysis>(*MF.getFunction().getParent());
+ MBFI = UseBlockFreqInfo ? GET_ANALYSIS(MachineBlockFrequency, Info, getMBFI)
+ : nullptr;
+ MBPI = GET_ANALYSIS(MachineBranchProbability, Info, getMBPI);
+ AA = (LegacyPass)
+ ? &LegacyPass->getAnalysis<AAResultsWrapperPass>().getAAResults()
+ : &MFAM->getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
+ .getManager()
+ .getResult<AAManager>(MF.getFunction());
+
RegClassInfo.runOnMachineFunction(MF);
- TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
- EnableSinkAndFold = PassConfig->getEnableSinkAndFold();
bool EverMadeChange = false;
@@ -748,7 +797,8 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
// If we have anything we marked as toSplit, split it now.
for (const auto &Pair : ToSplit) {
- auto NewSucc = Pair.first->SplitCriticalEdge(Pair.second, *this);
+ auto NewSucc =
+ Pair.first->SplitCriticalEdge(Pair.second, LegacyPass, MFAM, nullptr);
if (NewSucc != nullptr) {
LLVM_DEBUG(dbgs() << " *** Splitting critical edge: "
<< printMBBReference(*Pair.first) << " -- "
@@ -807,6 +857,7 @@ bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
MRI->clearKillFlags(I);
RegsToClearKillFlags.clear();
+ releaseMemory();
return EverMadeChange;
}
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index 5f3fe12cad7df5..9837dffafe945e 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -320,7 +320,7 @@ static IdentifyingPassPtr overridePass(AnalysisID StandardID,
if (StandardID == &MachineLICMID)
return applyDisable(TargetID, DisablePostRAMachineLICM);
- if (StandardID == &MachineSinkingID)
+ if (StandardID == &MachineSinkingLegacyID)
return applyDisable(TargetID, DisableMachineSink);
if (StandardID == &PostRAMachineSinkingID)
@@ -1311,7 +1311,7 @@ void TargetPassConfig::addMachineSSAOptimization() {
addPass(&EarlyMachineLICMID);
addPass(&MachineCSELegacyID);
- addPass(&MachineSinkingID);
+ addPass(&MachineSinkingLegacyID);
addPass(&PeepholeOptimizerID);
// Clean-up the dead code that may have been generated by peephole
diff --git a/llvm/lib/Passes/PassBuilder.cpp b/llvm/lib/Passes/PassBuilder.cpp
index ffee29818043a4..638213ecee4db1 100644
--- a/llvm/lib/Passes/PassBuilder.cpp
+++ b/llvm/lib/Passes/PassBuilder.cpp
@@ -115,6 +115,7 @@
#include "llvm/CodeGen/MachinePassManager.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/MachineSink.h"
#include "llvm/CodeGen/MachineTraceMetrics.h"
#include "llvm/CodeGen/MachineVerifier.h"
#include "llvm/CodeGen/OptimizePHIs.h"
@@ -1278,6 +1279,11 @@ Expected<RealtimeSanitizerOptions> parseRtSanPassOptions(StringRef Params) {
return Result;
}
+Expected<bool> parseMachineSinkingPassOptions(StringRef Params) {
+ return PassBuilder::parseSinglePassOption(Params, "enable-sink-fold",
+ "MachineSinkingPass");
+}
+
} // namespace
/// Tests whether a pass name starts with a valid prefix for a default pipeline
diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
index 31eb0b4fd7b721..28142077b3b104 100644
--- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
@@ -494,7 +494,7 @@ void NVPTXPassConfig::addMachineSSAOptimization() {
addPass(&EarlyMachineLICMID);
addPass(&MachineCSELegacyID);
- addPass(&MachineSinkingID);
+ addPass(&MachineSinkingLegacyID);
printAndVerify("After Machine LICM, CSE and Sinking passes");
addPass(&PeepholeOptimizerID);
diff --git a/llvm/test/CodeGen/AArch64/loop-sink.mir b/llvm/test/CodeGen/AArch64/loop-sink.mir
index 36d39ffbadc29a..de81d99369394b 100644
--- a/llvm/test/CodeGen/AArch64/loop-sink.mir
+++ b/llvm/test/CodeGen/AArch64/loop-sink.mir
@@ -1,5 +1,6 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple aarch64 -run-pass=machine-sink -sink-insts-to-avoid-spills -aarch64-enable-sink-fold=true %s -o - 2>&1 | FileCheck %s
+# RUN: llc -mtriple aarch64 -passes="machine-sink<enable-sink-fold>" -sink-insts-to-avoid-spills %s -o - 2>&1 | FileCheck %s
--- |
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64"
diff --git a/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir b/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
index be5737d297b290..f146c4436bbfa8 100644
--- a/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
+++ b/llvm/test/CodeGen/AArch64/sink-and-fold-preserve-debugloc.mir
@@ -1,4 +1,6 @@
# RUN: llc %s -run-pass=machine-sink --aarch64-enable-sink-fold=true -o - | FileCheck %s
+
+# RUN: llc %s -passes="machine-sink<enable-sink-fold>" -o - | FileCheck %s
--- |
target triple = "aarch64-linux"
diff --git a/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir b/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
index 329f2967121603..0732648f6c7a13 100644
--- a/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
+++ b/llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.mir
@@ -1,6 +1,8 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 3
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -run-pass=machine-sink -o - %s | FileCheck %s
+# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1031 -passes="function(machine-function(machine-sink))" -o - %s | FileCheck %s
+
---
name: machine-sink-temporal-divergence
tracksRegLiveness: true
diff --git a/llvm/test/CodeGen/ARM/machine-sink-multidef.mir b/llvm/test/CodeGen/ARM/machine-sink-multidef.mir
index 737ca824265d6b..485e659a53ab6b 100644
--- a/llvm/test/CodeGen/ARM/machine-sink-multidef.mir
+++ b/llvm/test/CodeGen/ARM/machine-sink-multidef.mir
@@ -1,6 +1,8 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc %s -o - -run-pass=machine-sink -mtriple=arm-none-eabi | FileCheck %s
+# RUN: llc %s -o - -passes=machine-sink -mtriple=arm-none-eabi | FileCheck %s
+
--- |
target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
target triple = "arm-none-unknown-eabi"
diff --git a/llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir b/llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
index 45621d98da3ef6..480b704f44af71 100644
--- a/llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
+++ b/llvm/test/CodeGen/Hexagon/machine-sink-float-usr.mir
@@ -1,5 +1,7 @@
# RUN: llc -march=hexagon -run-pass machine-sink -o - %s | FileCheck %s
+# RUN: llc -march=hexagon -passes machine-sink -o - %s | FileCheck %s
+
# Test that MachineSink does not sink F2_conv_w2sf.
# CHECK: name:{{.*}} main
# CHECK: J2_call @feclearexcept
diff --git a/llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir b/llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
index fe50d05ab93a5f..ee16a8c69afb74 100644
--- a/llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
+++ b/llvm/test/CodeGen/PowerPC/sink-down-more-instructions-1.mir
@@ -2,6 +2,8 @@
# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -o - %s -verify-machineinstrs \
# RUN: -run-pass=machine-sink | FileCheck %s
+# RUN: llc -mtriple powerpc64le-unknown-linux-gnu -o - %s -verify-machineinstrs \
+# RUN: -passes=machine-sink | FileCheck %s
--- |
; ModuleID = 'sink-down-more-instructions-1.ll'
source_filename = "sink-down-more-instructions-1.c"
diff --git a/llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir b/llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
index ef006fca60a401..8f5c763e950209 100644
--- a/llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
+++ b/llvm/test/CodeGen/RISCV/MachineSink-implicit-x0.mir
@@ -1,4 +1,5 @@
# RUN: llc -mtriple=riscv32 %s -run-pass=machine-sink -o - | FileCheck %s
+# RUN: llc -mtriple=riscv32 %s -passes=machine-sink -o - | FileCheck %s
# Verify that sinking of '%20:gpr = LUI 1, implicit $x0' is not inhibited by
# the implicit use of '$x0'.
diff --git a/llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir b/llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
index 8516cc9114c764..7b62c0b49b816a 100644
--- a/llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
+++ b/llvm/test/CodeGen/SystemZ/machinesink-dead-cc.mir
@@ -1,6 +1,9 @@
# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z15 -O3 -run-pass=machine-sink %s -o - \
# RUN: -verify-machineinstrs | FileCheck %s
#
+# RUN: llc -mtriple=s390x-linux-gnu -mcpu=z15 -O3 -passes=machine-sink %s -o - \
+# RUN: -verify-machineinstrs | FileCheck %s
+#
# Test that the AGHIK can be sunk into %bb.4. It has a def of CC, but it is dead.
--- |
diff --git a/llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir b/llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
index 643c557db77f7a..20207311e66cd8 100644
--- a/llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
+++ b/llvm/test/CodeGen/X86/machinesink-debug-inv-0.mir
@@ -2,6 +2,9 @@
# RUN: llc -mtriple=x86_64 -machine-sink-load-instrs-threshold=2 -run-pass=machine-sink %s -o - | FileCheck %s
# RUN: llc -mtriple=x86_64 -machine-sink-load-instrs-threshold=2 -run-pass=mir-debugify,machine-sink,mir-strip-debug %s -o - | FileCheck %s
+# RUN: llc -mtriple=x86_64 -machine-sink-load-instrs-threshold=2 -passes=machine-sink %s -o - | FileCheck %s
+# TODO: add test with mir-debugify once it is ported
+
# Verify that machine-sink pass is debug invariant wrt to given input. Since
# the pass examines MemOperands the IR is required for the original bug to
# trigger.
diff --git a/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir b/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
index 73a571dbf150f1..b7df7983073e80 100644
--- a/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
+++ b/llvm/test/DebugInfo/MIR/X86/sink-leaves-undef.mir
@@ -1,4 +1,5 @@
# RUN: llc %s -o - -run-pass=machine-sink -mtriple=x86_64-- | FileCheck %s
+# RUN: llc %s -o - -passes=machine-sink -mtriple=x86_64-- | FileCheck %s
# This is a copy of test/CodeGen/X86/MachineSink-DbgValue.ll, where we
# additionally test that when the MOV32rm defining %0 is sunk, it leaves
# an 'undef' DBG_VALUE behind to terminate earlier location ranges.
>From 40269b389971e7639e7d05c21eefc2b0bfd76d53 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Mon, 11 Nov 2024 08:13:11 +0000
Subject: [PATCH 2/3] Add printPipeline and remove manual optnone check
---
llvm/include/llvm/CodeGen/MachineSink.h | 3 +++
llvm/lib/CodeGen/MachineSink.cpp | 10 +++++++---
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/llvm/include/llvm/CodeGen/MachineSink.h b/llvm/include/llvm/CodeGen/MachineSink.h
index b5bb59619c0474..1eee9d7f7e2a4c 100644
--- a/llvm/include/llvm/CodeGen/MachineSink.h
+++ b/llvm/include/llvm/CodeGen/MachineSink.h
@@ -19,7 +19,10 @@ class MachineSinkingPass : public PassInfoMixin<MachineSinkingPass> {
public:
MachineSinkingPass(bool EnableSinkAndFold = false)
: EnableSinkAndFold(EnableSinkAndFold) {}
+
PreservedAnalyses run(MachineFunction &MF, MachineFunctionAnalysisManager &);
+
+ void printPipeline(raw_ostream &OS, function_ref<StringRef(StringRef)> MapClassName2PassName);
};
} // namespace llvm
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index c1de925c8b1ac0..50b0d3d8730722 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -729,9 +729,6 @@ void MachineSinking::FindCycleSinkCandidates(
PreservedAnalyses
MachineSinkingPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
- if (MF.getFunction().hasOptNone())
- return PreservedAnalyses::all();
-
MachineSinking Impl(nullptr, &MFAM, EnableSinkAndFold);
bool Changed = Impl.run(MF);
if (!Changed)
@@ -742,6 +739,13 @@ MachineSinkingPass::run(MachineFunction &MF,
return PA;
}
+void MachineSinkingPass::printPipeline(
+ raw_ostream &OS, function_ref<StringRef(StringRef)> MapClassName2PassName) {
+ OS << "machine-sink";
+ if (EnableSinkAndFold)
+ OS << "<enable-sink-fold>";
+}
+
bool MachineSinkingLegacy::runOnMachineFunction(MachineFunction &MF) {
if (skipFunction(MF.getFunction()))
return false;
>From 26b9f15bb3a8e0d0102150360e56a6494811beb9 Mon Sep 17 00:00:00 2001
From: Akshat Oke <Akshat.Oke at amd.com>
Date: Thu, 14 Nov 2024 11:09:09 +0000
Subject: [PATCH 3/3] Use MFAnalysisGetter
---
llvm/include/llvm/Analysis/AliasAnalysis.h | 5 +++
.../llvm/Analysis/ProfileSummaryInfo.h | 4 ++
.../llvm/CodeGen/MachineBlockFrequencyInfo.h | 5 +++
.../CodeGen/MachineBranchProbabilityInfo.h | 5 +++
.../llvm/CodeGen/MachineCycleAnalysis.h | 4 ++
llvm/include/llvm/CodeGen/MachineDominators.h | 5 +++
.../llvm/CodeGen/MachinePostDominators.h | 6 +++
llvm/lib/CodeGen/MachineSink.cpp | 44 +++++++------------
8 files changed, 49 insertions(+), 29 deletions(-)
diff --git a/llvm/include/llvm/Analysis/AliasAnalysis.h b/llvm/include/llvm/Analysis/AliasAnalysis.h
index 9c6084d2d9deeb..361d2b8ffdf6e6 100644
--- a/llvm/include/llvm/Analysis/AliasAnalysis.h
+++ b/llvm/include/llvm/Analysis/AliasAnalysis.h
@@ -899,6 +899,7 @@ bool isNotVisibleOnUnwind(const Value *Object,
/// loads.
bool isWritableObject(const Value *Object, bool &ExplicitlyDereferenceableOnly);
+class AAResultsWrapperPass;
/// A manager for alias analyses.
///
/// This class can have analyses registered with it and when run, it will run
@@ -919,6 +920,7 @@ bool isWritableObject(const Value *Object, bool &ExplicitlyDereferenceableOnly);
class AAManager : public AnalysisInfoMixin<AAManager> {
public:
using Result = AAResults;
+ using LegacyWrapper = AAResultsWrapperPass;
/// Register a specific AA result.
template <typename AnalysisT> void registerFunctionAnalysis() {
@@ -975,6 +977,9 @@ class AAResultsWrapperPass : public FunctionPass {
AAResults &getAAResults() { return *AAR; }
const AAResults &getAAResults() const { return *AAR; }
+ AAResults &getResult() { return *AAR; }
+ const AAResults &getResult() const { return *AAR; }
+
bool runOnFunction(Function &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
diff --git a/llvm/include/llvm/Analysis/ProfileSummaryInfo.h b/llvm/include/llvm/Analysis/ProfileSummaryInfo.h
index ceae3e8a0ddb95..51fdce5ae5c8d5 100644
--- a/llvm/include/llvm/Analysis/ProfileSummaryInfo.h
+++ b/llvm/include/llvm/Analysis/ProfileSummaryInfo.h
@@ -360,6 +360,9 @@ class ProfileSummaryInfoWrapperPass : public ImmutablePass {
ProfileSummaryInfo &getPSI() { return *PSI; }
const ProfileSummaryInfo &getPSI() const { return *PSI; }
+ ProfileSummaryInfo &getResult() { return *PSI; }
+ const ProfileSummaryInfo &getResult() const { return *PSI; }
+
bool doInitialization(Module &M) override;
bool doFinalization(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
@@ -372,6 +375,7 @@ class ProfileSummaryAnalysis
: public AnalysisInfoMixin<ProfileSummaryAnalysis> {
public:
typedef ProfileSummaryInfo Result;
+ using LegacyWrapper = ProfileSummaryInfoWrapperPass;
Result run(Module &M, ModuleAnalysisManager &);
diff --git a/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h b/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
index 546a5be3176672..9420480b51d075 100644
--- a/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineBlockFrequencyInfo.h
@@ -109,6 +109,7 @@ Printable printBlockFreq(const MachineBlockFrequencyInfo &MBFI,
Printable printBlockFreq(const MachineBlockFrequencyInfo &MBFI,
const MachineBasicBlock &MBB);
+class MachineBlockFrequencyInfoWrapperPass;
class MachineBlockFrequencyAnalysis
: public AnalysisInfoMixin<MachineBlockFrequencyAnalysis> {
friend AnalysisInfoMixin<MachineBlockFrequencyAnalysis>;
@@ -116,6 +117,7 @@ class MachineBlockFrequencyAnalysis
public:
using Result = MachineBlockFrequencyInfo;
+ using LegacyWrapper = MachineBlockFrequencyInfoWrapperPass;
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
};
@@ -151,6 +153,9 @@ class MachineBlockFrequencyInfoWrapperPass : public MachineFunctionPass {
MachineBlockFrequencyInfo &getMBFI() { return MBFI; }
const MachineBlockFrequencyInfo &getMBFI() const { return MBFI; }
+
+ MachineBlockFrequencyInfo &getResult() { return MBFI; }
+ const MachineBlockFrequencyInfo &getResult() const { return MBFI; }
};
} // end namespace llvm
diff --git a/llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h b/llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
index 12d33f96edd116..cdf706fc56a69d 100644
--- a/llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
+++ b/llvm/include/llvm/CodeGen/MachineBranchProbabilityInfo.h
@@ -55,6 +55,7 @@ class MachineBranchProbabilityInfo {
const MachineBasicBlock *Dst) const;
};
+class MachineBranchProbabilityInfoWrapperPass;
class MachineBranchProbabilityAnalysis
: public AnalysisInfoMixin<MachineBranchProbabilityAnalysis> {
friend AnalysisInfoMixin<MachineBranchProbabilityAnalysis>;
@@ -63,6 +64,7 @@ class MachineBranchProbabilityAnalysis
public:
using Result = MachineBranchProbabilityInfo;
+ using LegacyWrapper = MachineBranchProbabilityInfoWrapperPass;
Result run(MachineFunction &, MachineFunctionAnalysisManager &);
};
@@ -93,6 +95,9 @@ class MachineBranchProbabilityInfoWrapperPass : public ImmutablePass {
MachineBranchProbabilityInfo &getMBPI() { return MBPI; }
const MachineBranchProbabilityInfo &getMBPI() const { return MBPI; }
+
+ MachineBranchProbabilityInfo &getResult() { return MBPI; }
+ const MachineBranchProbabilityInfo &getResult() const { return MBPI; }
};
}
diff --git a/llvm/include/llvm/CodeGen/MachineCycleAnalysis.h b/llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
index 64cf30e6ddf3b8..42699d580276d0 100644
--- a/llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
+++ b/llvm/include/llvm/CodeGen/MachineCycleAnalysis.h
@@ -37,6 +37,9 @@ class MachineCycleInfoWrapperPass : public MachineFunctionPass {
MachineCycleInfo &getCycleInfo() { return CI; }
const MachineCycleInfo &getCycleInfo() const { return CI; }
+ MachineCycleInfo &getResult() { return CI; }
+ const MachineCycleInfo &getResult() const { return CI; }
+
bool runOnMachineFunction(MachineFunction &F) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override;
@@ -53,6 +56,7 @@ class MachineCycleAnalysis : public AnalysisInfoMixin<MachineCycleAnalysis> {
public:
using Result = MachineCycleInfo;
+ using LegacyWrapper = MachineCycleInfoWrapperPass;
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
};
diff --git a/llvm/include/llvm/CodeGen/MachineDominators.h b/llvm/include/llvm/CodeGen/MachineDominators.h
index 74cf94398736dd..684437c30e4d2a 100644
--- a/llvm/include/llvm/CodeGen/MachineDominators.h
+++ b/llvm/include/llvm/CodeGen/MachineDominators.h
@@ -267,6 +267,7 @@ class MachineDominatorTree : public DomTreeBase<MachineBasicBlock> {
}
};
+class MachineDominatorTreeWrapperPass;
/// \brief Analysis pass which computes a \c MachineDominatorTree.
class MachineDominatorTreeAnalysis
: public AnalysisInfoMixin<MachineDominatorTreeAnalysis> {
@@ -276,6 +277,7 @@ class MachineDominatorTreeAnalysis
public:
using Result = MachineDominatorTree;
+ using LegacyWrapper = MachineDominatorTreeWrapperPass;
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &);
};
@@ -306,6 +308,9 @@ class MachineDominatorTreeWrapperPass : public MachineFunctionPass {
MachineDominatorTree &getDomTree() { return *DT; }
const MachineDominatorTree &getDomTree() const { return *DT; }
+ MachineDominatorTree &getResult() { return *DT; }
+ const MachineDominatorTree &getResult() const { return *DT; }
+
bool runOnMachineFunction(MachineFunction &MF) override;
void verifyAnalysis() const override;
diff --git a/llvm/include/llvm/CodeGen/MachinePostDominators.h b/llvm/include/llvm/CodeGen/MachinePostDominators.h
index 1d37272e0315fe..9c5c9780d3cc33 100644
--- a/llvm/include/llvm/CodeGen/MachinePostDominators.h
+++ b/llvm/include/llvm/CodeGen/MachinePostDominators.h
@@ -64,6 +64,8 @@ class MachinePostDominatorTree : public PostDomTreeBase<MachineBasicBlock> {
findNearestCommonDominator(ArrayRef<MachineBasicBlock *> Blocks) const;
};
+class MachinePostDominatorTreeWrapperPass;
+
class MachinePostDominatorTreeAnalysis
: public AnalysisInfoMixin<MachinePostDominatorTreeAnalysis> {
friend AnalysisInfoMixin<MachinePostDominatorTreeAnalysis>;
@@ -72,6 +74,7 @@ class MachinePostDominatorTreeAnalysis
public:
using Result = MachinePostDominatorTree;
+ using LegacyWrapper = MachinePostDominatorTreeWrapperPass;
Result run(MachineFunction &MF, MachineFunctionAnalysisManager &MFAM);
};
@@ -98,6 +101,9 @@ class MachinePostDominatorTreeWrapperPass : public MachineFunctionPass {
MachinePostDominatorTree &getPostDomTree() { return *PDT; }
const MachinePostDominatorTree &getPostDomTree() const { return *PDT; }
+ MachinePostDominatorTree &getResult() { return *PDT; }
+ const MachinePostDominatorTree &getResult() const { return *PDT; }
+
bool runOnMachineFunction(MachineFunction &MF) override;
void getAnalysisUsage(AnalysisUsage &AU) const override;
void releaseMemory() override { PDT.reset(); }
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 50b0d3d8730722..88ee87b036e17a 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -130,8 +130,7 @@ class MachineSinking {
const MachineBranchProbabilityInfo *MBPI = nullptr;
AliasAnalysis *AA = nullptr;
RegisterClassInfo RegClassInfo;
- Pass *LegacyPass;
- MachineFunctionAnalysisManager *MFAM;
+ MFAnalysisGetter &AG;
// Remember which edges have been considered for breaking.
SmallSet<std::pair<MachineBasicBlock *, MachineBasicBlock *>, 8>
@@ -187,10 +186,8 @@ class MachineSinking {
bool EnableSinkAndFold;
public:
- MachineSinking(Pass *LegacyPass, MachineFunctionAnalysisManager *MFAM,
- bool EnableSinkAndFold)
- : LegacyPass(LegacyPass), MFAM(MFAM),
- EnableSinkAndFold(EnableSinkAndFold) {}
+ MachineSinking(MFAnalysisGetter &&AG, bool EnableSinkAndFold)
+ : AG(AG), EnableSinkAndFold(EnableSinkAndFold) {}
bool run(MachineFunction &MF);
@@ -729,7 +726,7 @@ void MachineSinking::FindCycleSinkCandidates(
PreservedAnalyses
MachineSinkingPass::run(MachineFunction &MF,
MachineFunctionAnalysisManager &MFAM) {
- MachineSinking Impl(nullptr, &MFAM, EnableSinkAndFold);
+ MachineSinking Impl(MFAnalysisGetter(&MFAM), EnableSinkAndFold);
bool Changed = Impl.run(MF);
if (!Changed)
return PreservedAnalyses::all();
@@ -753,15 +750,10 @@ bool MachineSinkingLegacy::runOnMachineFunction(MachineFunction &MF) {
TargetPassConfig *PassConfig = &getAnalysis<TargetPassConfig>();
bool EnableSinkAndFold = PassConfig->getEnableSinkAndFold();
- MachineSinking Impl(this, nullptr, EnableSinkAndFold);
+ MachineSinking Impl(MFAnalysisGetter(this), EnableSinkAndFold);
return Impl.run(MF);
}
-#define GET_ANALYSIS(ANALYSIS, INFIX, GETTER) \
- ((LegacyPass) \
- ? &LegacyPass->getAnalysis<ANALYSIS##INFIX##WrapperPass>().GETTER() \
- : &MFAM->getResult<ANALYSIS##Analysis>(MF))
-
bool MachineSinking::run(MachineFunction &MF) {
LLVM_DEBUG(dbgs() << "******** Machine Sinking ********\n");
@@ -769,21 +761,15 @@ bool MachineSinking::run(MachineFunction &MF) {
TII = STI->getInstrInfo();
TRI = STI->getRegisterInfo();
MRI = &MF.getRegInfo();
- DT = GET_ANALYSIS(MachineDominatorTree, , getDomTree);
- PDT = GET_ANALYSIS(MachinePostDominatorTree, , getPostDomTree);
- CI = GET_ANALYSIS(MachineCycle, Info, getCycleInfo);
- PSI = (LegacyPass)
- ? &LegacyPass->getAnalysis<ProfileSummaryInfoWrapperPass>().getPSI()
- : MFAM->getResult<ModuleAnalysisManagerMachineFunctionProxy>(MF)
- .getCachedResult<ProfileSummaryAnalysis>(*MF.getFunction().getParent());
- MBFI = UseBlockFreqInfo ? GET_ANALYSIS(MachineBlockFrequency, Info, getMBFI)
+
+ DT = AG.getAnalysis<MachineDominatorTreeAnalysis>(MF);
+ PDT = AG.getAnalysis<MachinePostDominatorTreeAnalysis>(MF);
+ CI = AG.getAnalysis<MachineCycleAnalysis>(MF);
+ PSI = AG.getAnalysis<ProfileSummaryAnalysis>(MF);
+ MBFI = UseBlockFreqInfo ? AG.getAnalysis<MachineBlockFrequencyAnalysis>(MF)
: nullptr;
- MBPI = GET_ANALYSIS(MachineBranchProbability, Info, getMBPI);
- AA = (LegacyPass)
- ? &LegacyPass->getAnalysis<AAResultsWrapperPass>().getAAResults()
- : &MFAM->getResult<FunctionAnalysisManagerMachineFunctionProxy>(MF)
- .getManager()
- .getResult<AAManager>(MF.getFunction());
+ MBPI = AG.getAnalysis<MachineBranchProbabilityAnalysis>(MF);
+ AA = AG.getAnalysis<AAManager>(MF);
RegClassInfo.runOnMachineFunction(MF);
@@ -801,8 +787,8 @@ bool MachineSinking::run(MachineFunction &MF) {
// If we have anything we marked as toSplit, split it now.
for (const auto &Pair : ToSplit) {
- auto NewSucc =
- Pair.first->SplitCriticalEdge(Pair.second, LegacyPass, MFAM, nullptr);
+ auto NewSucc = Pair.first->SplitCriticalEdge(
+ Pair.second, AG.getLegacyPass(), AG.getMFAM(), nullptr);
if (NewSucc != nullptr) {
LLVM_DEBUG(dbgs() << " *** Splitting critical edge: "
<< printMBBReference(*Pair.first) << " -- "
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