[llvm-branch-commits] [clang] [llvm] Backport "riscv-isa" module metadata to 18.x (PR #91514)

[Eli Friedman via llvm-branch-commits]

efriedma-quic wrote:

Can you briefly summarize why this is important to backport?  At first glance, this is only relevant for LTO with mixed architecture specifications, which... I can see someone might want it, I guess, but it seems pretty easy to work around not having it.

https://github.com/llvm/llvm-project/pull/91514