[llvm-branch-commits] [llvm] release/18.x: [Mips] Restore wrong deletion of instruction 'and' in unsigned min/max processing. (#85902) (PR #86424)
Tom Stellard via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Mar 27 16:09:27 PDT 2024
https://github.com/tstellar updated https://github.com/llvm/llvm-project/pull/86424
>From fbb27d16fa12aa595cbd20a1fb5f1c5b80748fa4 Mon Sep 17 00:00:00 2001
From: yingopq <115543042+yingopq at users.noreply.github.com>
Date: Sat, 9 Mar 2024 04:41:31 +0800
Subject: [PATCH 1/2] [Mips] Fix missing sign extension in expansion of
sub-word atomic max (#77072)
Add sign extension "SEB/SEH" before compare.
Fix #61881
(cherry picked from commit 755b439694432d4f68e20e979b479cbc30602bb1)
---
llvm/lib/Target/Mips/MipsExpandPseudo.cpp | 51 +-
llvm/test/CodeGen/Mips/atomic-min-max.ll | 655 ++++++++++++++++++----
2 files changed, 577 insertions(+), 129 deletions(-)
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index 2c2554b5b4bc3b..bded59439a736a 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -388,18 +388,32 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
Opcode = Mips::XOR;
break;
case Mips::ATOMIC_LOAD_UMIN_I8_POSTRA:
+ IsUnsigned = true;
+ IsMin = true;
+ break;
case Mips::ATOMIC_LOAD_UMIN_I16_POSTRA:
IsUnsigned = true;
- [[fallthrough]];
+ IsMin = true;
+ break;
case Mips::ATOMIC_LOAD_MIN_I8_POSTRA:
+ SEOp = Mips::SEB;
+ IsMin = true;
+ break;
case Mips::ATOMIC_LOAD_MIN_I16_POSTRA:
IsMin = true;
break;
case Mips::ATOMIC_LOAD_UMAX_I8_POSTRA:
+ IsUnsigned = true;
+ IsMax = true;
+ break;
case Mips::ATOMIC_LOAD_UMAX_I16_POSTRA:
IsUnsigned = true;
- [[fallthrough]];
+ IsMax = true;
+ break;
case Mips::ATOMIC_LOAD_MAX_I8_POSTRA:
+ SEOp = Mips::SEB;
+ IsMax = true;
+ break;
case Mips::ATOMIC_LOAD_MAX_I16_POSTRA:
IsMax = true;
break;
@@ -461,14 +475,33 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
// For little endian we need to clear uninterested bits.
if (STI->isLittle()) {
- // and OldVal, OldVal, Mask
- // and Incr, Incr, Mask
- BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
- .addReg(OldVal)
- .addReg(Mask);
- BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr).addReg(Incr).addReg(Mask);
+ if (!IsUnsigned) {
+ BuildMI(loopMBB, DL, TII->get(Mips::SRAV), OldVal)
+ .addReg(OldVal)
+ .addReg(ShiftAmnt);
+ BuildMI(loopMBB, DL, TII->get(Mips::SRAV), Incr)
+ .addReg(Incr)
+ .addReg(ShiftAmnt);
+ if (STI->hasMips32r2()) {
+ BuildMI(loopMBB, DL, TII->get(SEOp), OldVal).addReg(OldVal);
+ BuildMI(loopMBB, DL, TII->get(SEOp), Incr).addReg(Incr);
+ } else {
+ const unsigned ShiftImm = SEOp == Mips::SEH ? 16 : 24;
+ BuildMI(loopMBB, DL, TII->get(Mips::SLL), OldVal)
+ .addReg(OldVal, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(Mips::SRA), OldVal)
+ .addReg(OldVal, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(Mips::SLL), Incr)
+ .addReg(Incr, RegState::Kill)
+ .addImm(ShiftImm);
+ BuildMI(loopMBB, DL, TII->get(Mips::SRA), Incr)
+ .addReg(Incr, RegState::Kill)
+ .addImm(ShiftImm);
+ }
+ }
}
-
// unsigned: sltu Scratch4, oldVal, Incr
// signed: slt Scratch4, oldVal, Incr
BuildMI(loopMBB, DL, TII->get(SLTScratch4), Scratch4)
diff --git a/llvm/test/CodeGen/Mips/atomic-min-max.ll b/llvm/test/CodeGen/Mips/atomic-min-max.ll
index f953c885ea7345..bc3643f3947a40 100644
--- a/llvm/test/CodeGen/Mips/atomic-min-max.ll
+++ b/llvm/test/CodeGen/Mips/atomic-min-max.ll
@@ -3,6 +3,7 @@
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSR6
; RUN: llc -march=mips -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MM
; RUN: llc -march=mips -O0 -mcpu=mips32r6 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMR6
+; RUN: llc -march=mipsel -O0 -mcpu=mips32 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPS32
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSEL
; RUN: llc -march=mipsel -O0 -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MIPSELR6
; RUN: llc -march=mipsel -O0 -mcpu=mips32r2 -mattr=+micromips -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=MMEL
@@ -77,6 +78,23 @@ define i32 @test_max_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_max_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB0_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: slt $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movn $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB0_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_max_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -280,6 +298,23 @@ define i32 @test_min_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_min_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB1_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: slt $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movz $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB1_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_min_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -483,6 +518,23 @@ define i32 @test_umax_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umax_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB2_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: sltu $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movn $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB2_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umax_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -686,6 +738,23 @@ define i32 @test_umin_32(ptr nocapture %ptr, i32 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umin_32:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: $BB3_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($4)
+; MIPS32-NEXT: sltu $3, $2, $5
+; MIPS32-NEXT: move $1, $2
+; MIPS32-NEXT: movz $1, $5, $3
+; MIPS32-NEXT: sc $1, 0($4)
+; MIPS32-NEXT: beqz $1, $BB3_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umin_32:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: sync
@@ -980,6 +1049,53 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: sync
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
+;
+; MIPS32-LABEL: test_max_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB4_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 16
+; MIPS32-NEXT: sra $2, $2, 16
+; MIPS32-NEXT: sll $7, $7, 16
+; MIPS32-NEXT: sra $7, $7, 16
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB4_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+
;
; MIPSEL-LABEL: test_max_16:
; MIPSEL: # %bb.0: # %entry
@@ -998,8 +1114,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB4_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seh $2, $2
+; MIPSEL-NEXT: seh $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -1039,8 +1157,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB4_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seh $2, $2
+; MIPSELR6-NEXT: seh $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -1079,8 +1199,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB4_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seh $2, $2
+; MMEL-NEXT: seh $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -1118,8 +1240,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB4_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seh $2, $2
+; MMELR6-NEXT: seh $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -1237,8 +1361,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB4_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seh $2, $2
+; MIPS64EL-NEXT: seh $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -1278,8 +1404,10 @@ define i16 @test_max_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB4_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seh $2, $2
+; MIPS64ELR6-NEXT: seh $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -1462,6 +1590,52 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_min_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB5_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 16
+; MIPS32-NEXT: sra $2, $2, 16
+; MIPS32-NEXT: sll $7, $7, 16
+; MIPS32-NEXT: sra $7, $7, 16
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB5_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_min_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -1479,8 +1653,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB5_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seh $2, $2
+; MIPSEL-NEXT: seh $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -1520,8 +1696,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB5_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seh $2, $2
+; MIPSELR6-NEXT: seh $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -1560,8 +1738,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB5_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seh $2, $2
+; MMEL-NEXT: seh $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -1599,8 +1779,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB5_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seh $2, $2
+; MMELR6-NEXT: seh $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -1718,8 +1900,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB5_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seh $2, $2
+; MIPS64EL-NEXT: seh $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -1759,8 +1943,10 @@ define i16 @test_min_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB5_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seh $2, $2
+; MIPS64ELR6-NEXT: seh $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
@@ -1943,6 +2129,46 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umax_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB6_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB6_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umax_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -1960,8 +2186,6 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB6_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -2001,8 +2225,6 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB6_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -2041,8 +2263,6 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB6_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -2080,8 +2300,6 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB6_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -2199,8 +2417,6 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB6_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -2240,8 +2456,6 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB6_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -2424,6 +2638,47 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umin_16:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 65535
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB7_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB7_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
+;
; MIPSEL-LABEL: test_umin_16:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -2441,8 +2696,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB7_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -2482,8 +2735,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB7_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -2522,8 +2773,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB7_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -2561,8 +2810,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB7_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -2680,8 +2927,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB7_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -2721,8 +2966,6 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB7_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
@@ -2780,7 +3023,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: # %bb.2: # %entry
; MIPS-NEXT: and $1, $2, $8
; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: seb $1, $1
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -2820,7 +3063,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: # %bb.2: # %entry
; MIPSR6-NEXT: and $1, $2, $8
; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: seb $1, $1
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -2858,7 +3101,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: # %bb.2: # %entry
; MM-NEXT: and $1, $2, $8
; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: seb $1, $1
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -2897,7 +3140,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: # %bb.2: # %entry
; MMR6-NEXT: and $1, $2, $8
; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: seb $1, $1
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -2906,6 +3149,52 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_max_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB8_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 24
+; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: sll $7, $7, 24
+; MIPS32-NEXT: sra $7, $7, 24
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB8_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_max_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -2923,8 +3212,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB8_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seb $2, $2
+; MIPSEL-NEXT: seb $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -2937,7 +3228,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: # %bb.2: # %entry
; MIPSEL-NEXT: and $1, $2, $8
; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: seb $1, $1
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -2964,8 +3255,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB8_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seb $2, $2
+; MIPSELR6-NEXT: seb $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -2978,7 +3271,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: # %bb.2: # %entry
; MIPSELR6-NEXT: and $1, $2, $8
; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: seb $1, $1
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -3004,8 +3297,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB8_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seb $2, $2
+; MMEL-NEXT: seb $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -3017,7 +3312,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: # %bb.2: # %entry
; MMEL-NEXT: and $1, $2, $8
; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: seb $1, $1
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -3043,8 +3338,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB8_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seb $2, $2
+; MMELR6-NEXT: seb $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -3057,7 +3354,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: # %bb.2: # %entry
; MMELR6-NEXT: and $1, $2, $8
; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: seb $1, $1
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -3096,7 +3393,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: # %bb.2: # %entry
; MIPS64-NEXT: and $1, $2, $8
; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: seb $1, $1
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -3136,7 +3433,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: # %bb.2: # %entry
; MIPS64R6-NEXT: and $1, $2, $8
; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -3162,8 +3459,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB8_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seb $2, $2
+; MIPS64EL-NEXT: seb $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -3176,7 +3475,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: # %bb.2: # %entry
; MIPS64EL-NEXT: and $1, $2, $8
; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: seb $1, $1
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -3203,8 +3502,10 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB8_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seb $2, $2
+; MIPS64ELR6-NEXT: seb $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -3217,7 +3518,7 @@ define i8 @test_max_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: # %bb.2: # %entry
; MIPS64ELR6-NEXT: and $1, $2, $8
; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: seb $1, $1
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -3261,7 +3562,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS-NEXT: # %bb.2: # %entry
; MIPS-NEXT: and $1, $2, $8
; MIPS-NEXT: srlv $1, $1, $10
-; MIPS-NEXT: seh $1, $1
+; MIPS-NEXT: seb $1, $1
; MIPS-NEXT: # %bb.3: # %entry
; MIPS-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPS-NEXT: # %bb.4: # %entry
@@ -3301,7 +3602,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSR6-NEXT: # %bb.2: # %entry
; MIPSR6-NEXT: and $1, $2, $8
; MIPSR6-NEXT: srlv $1, $1, $10
-; MIPSR6-NEXT: seh $1, $1
+; MIPSR6-NEXT: seb $1, $1
; MIPSR6-NEXT: # %bb.3: # %entry
; MIPSR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSR6-NEXT: # %bb.4: # %entry
@@ -3339,7 +3640,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MM-NEXT: # %bb.2: # %entry
; MM-NEXT: and $1, $2, $8
; MM-NEXT: srlv $1, $1, $10
-; MM-NEXT: seh $1, $1
+; MM-NEXT: seb $1, $1
; MM-NEXT: # %bb.3: # %entry
; MM-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MM-NEXT: # %bb.4: # %entry
@@ -3378,7 +3679,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: # %bb.2: # %entry
; MMR6-NEXT: and $1, $2, $8
; MMR6-NEXT: srlv $1, $1, $10
-; MMR6-NEXT: seh $1, $1
+; MMR6-NEXT: seb $1, $1
; MMR6-NEXT: # %bb.3: # %entry
; MMR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMR6-NEXT: # %bb.4: # %entry
@@ -3387,6 +3688,52 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_min_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB9_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: srav $2, $2, $10
+; MIPS32-NEXT: srav $7, $7, $10
+; MIPS32-NEXT: sll $2, $2, 24
+; MIPS32-NEXT: sra $2, $2, 24
+; MIPS32-NEXT: sll $7, $7, 24
+; MIPS32-NEXT: sra $7, $7, 24
+; MIPS32-NEXT: slt $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB9_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 24
+; MIPS32-NEXT: sra $1, $1, 24
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_min_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -3404,8 +3751,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB9_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
+; MIPSEL-NEXT: srav $2, $2, $10
+; MIPSEL-NEXT: srav $7, $7, $10
+; MIPSEL-NEXT: seb $2, $2
+; MIPSEL-NEXT: seb $7, $7
; MIPSEL-NEXT: slt $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -3418,7 +3767,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: # %bb.2: # %entry
; MIPSEL-NEXT: and $1, $2, $8
; MIPSEL-NEXT: srlv $1, $1, $10
-; MIPSEL-NEXT: seh $1, $1
+; MIPSEL-NEXT: seb $1, $1
; MIPSEL-NEXT: # %bb.3: # %entry
; MIPSEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSEL-NEXT: # %bb.4: # %entry
@@ -3445,8 +3794,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB9_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
+; MIPSELR6-NEXT: srav $2, $2, $10
+; MIPSELR6-NEXT: srav $7, $7, $10
+; MIPSELR6-NEXT: seb $2, $2
+; MIPSELR6-NEXT: seb $7, $7
; MIPSELR6-NEXT: slt $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -3459,7 +3810,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: # %bb.2: # %entry
; MIPSELR6-NEXT: and $1, $2, $8
; MIPSELR6-NEXT: srlv $1, $1, $10
-; MIPSELR6-NEXT: seh $1, $1
+; MIPSELR6-NEXT: seb $1, $1
; MIPSELR6-NEXT: # %bb.3: # %entry
; MIPSELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MIPSELR6-NEXT: # %bb.4: # %entry
@@ -3485,8 +3836,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB9_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
+; MMEL-NEXT: srav $2, $2, $10
+; MMEL-NEXT: srav $7, $7, $10
+; MMEL-NEXT: seb $2, $2
+; MMEL-NEXT: seb $7, $7
; MMEL-NEXT: slt $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -3498,7 +3851,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: # %bb.2: # %entry
; MMEL-NEXT: and $1, $2, $8
; MMEL-NEXT: srlv $1, $1, $10
-; MMEL-NEXT: seh $1, $1
+; MMEL-NEXT: seb $1, $1
; MMEL-NEXT: # %bb.3: # %entry
; MMEL-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMEL-NEXT: # %bb.4: # %entry
@@ -3524,8 +3877,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB9_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
+; MMELR6-NEXT: srav $2, $2, $10
+; MMELR6-NEXT: srav $7, $7, $10
+; MMELR6-NEXT: seb $2, $2
+; MMELR6-NEXT: seb $7, $7
; MMELR6-NEXT: slt $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -3538,7 +3893,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: # %bb.2: # %entry
; MMELR6-NEXT: and $1, $2, $8
; MMELR6-NEXT: srlv $1, $1, $10
-; MMELR6-NEXT: seh $1, $1
+; MMELR6-NEXT: seb $1, $1
; MMELR6-NEXT: # %bb.3: # %entry
; MMELR6-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
; MMELR6-NEXT: # %bb.4: # %entry
@@ -3577,7 +3932,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64-NEXT: # %bb.2: # %entry
; MIPS64-NEXT: and $1, $2, $8
; MIPS64-NEXT: srlv $1, $1, $10
-; MIPS64-NEXT: seh $1, $1
+; MIPS64-NEXT: seb $1, $1
; MIPS64-NEXT: # %bb.3: # %entry
; MIPS64-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64-NEXT: # %bb.4: # %entry
@@ -3617,7 +3972,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64R6-NEXT: # %bb.2: # %entry
; MIPS64R6-NEXT: and $1, $2, $8
; MIPS64R6-NEXT: srlv $1, $1, $10
-; MIPS64R6-NEXT: seh $1, $1
+; MIPS64R6-NEXT: seb $1, $1
; MIPS64R6-NEXT: # %bb.3: # %entry
; MIPS64R6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64R6-NEXT: # %bb.4: # %entry
@@ -3643,8 +3998,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB9_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
+; MIPS64EL-NEXT: srav $2, $2, $10
+; MIPS64EL-NEXT: srav $7, $7, $10
+; MIPS64EL-NEXT: seb $2, $2
+; MIPS64EL-NEXT: seb $7, $7
; MIPS64EL-NEXT: slt $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -3657,7 +4014,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: # %bb.2: # %entry
; MIPS64EL-NEXT: and $1, $2, $8
; MIPS64EL-NEXT: srlv $1, $1, $10
-; MIPS64EL-NEXT: seh $1, $1
+; MIPS64EL-NEXT: seb $1, $1
; MIPS64EL-NEXT: # %bb.3: # %entry
; MIPS64EL-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64EL-NEXT: # %bb.4: # %entry
@@ -3684,8 +4041,10 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB9_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
+; MIPS64ELR6-NEXT: srav $2, $2, $10
+; MIPS64ELR6-NEXT: srav $7, $7, $10
+; MIPS64ELR6-NEXT: seb $2, $2
+; MIPS64ELR6-NEXT: seb $7, $7
; MIPS64ELR6-NEXT: slt $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
@@ -3698,7 +4057,7 @@ define i8 @test_min_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: # %bb.2: # %entry
; MIPS64ELR6-NEXT: and $1, $2, $8
; MIPS64ELR6-NEXT: srlv $1, $1, $10
-; MIPS64ELR6-NEXT: seh $1, $1
+; MIPS64ELR6-NEXT: seb $1, $1
; MIPS64ELR6-NEXT: # %bb.3: # %entry
; MIPS64ELR6-NEXT: sw $1, 12($sp) # 4-byte Folded Spill
; MIPS64ELR6-NEXT: # %bb.4: # %entry
@@ -3868,6 +4227,46 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umax_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB10_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movn $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB10_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umax_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -3885,8 +4284,6 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB10_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -3926,8 +4323,6 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB10_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -3966,8 +4361,6 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB10_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -4005,8 +4398,6 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB10_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -4124,8 +4515,6 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB10_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -4165,8 +4554,6 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB10_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -4349,6 +4736,46 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMR6-NEXT: addiu $sp, $sp, 8
; MMR6-NEXT: jrc $ra
;
+; MIPS32-LABEL: test_umin_8:
+; MIPS32: # %bb.0: # %entry
+; MIPS32-NEXT: addiu $sp, $sp, -8
+; MIPS32-NEXT: .cfi_def_cfa_offset 8
+; MIPS32-NEXT: # kill: def $at killed $a1
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $1, $zero, -4
+; MIPS32-NEXT: and $6, $4, $1
+; MIPS32-NEXT: andi $1, $4, 3
+; MIPS32-NEXT: sll $10, $1, 3
+; MIPS32-NEXT: ori $1, $zero, 255
+; MIPS32-NEXT: sllv $8, $1, $10
+; MIPS32-NEXT: nor $9, $zero, $8
+; MIPS32-NEXT: sllv $7, $5, $10
+; MIPS32-NEXT: $BB11_1: # %entry
+; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
+; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: sltu $5, $2, $7
+; MIPS32-NEXT: move $3, $2
+; MIPS32-NEXT: movz $3, $7, $5
+; MIPS32-NEXT: and $3, $3, $8
+; MIPS32-NEXT: and $4, $2, $9
+; MIPS32-NEXT: or $4, $4, $3
+; MIPS32-NEXT: sc $4, 0($6)
+; MIPS32-NEXT: beqz $4, $BB11_1
+; MIPS32-NEXT: nop
+; MIPS32-NEXT: # %bb.2: # %entry
+; MIPS32-NEXT: and $1, $2, $8
+; MIPS32-NEXT: srlv $1, $1, $10
+; MIPS32-NEXT: sll $1, $1, 16
+; MIPS32-NEXT: sra $1, $1, 16
+; MIPS32-NEXT: # %bb.3: # %entry
+; MIPS32-NEXT: sw $1, 4($sp) # 4-byte Folded Spill
+; MIPS32-NEXT: # %bb.4: # %entry
+; MIPS32-NEXT: lw $2, 4($sp) # 4-byte Folded Reload
+; MIPS32-NEXT: sync
+; MIPS32-NEXT: addiu $sp, $sp, 8
+; MIPS32-NEXT: jr $ra
+; MIPS32-NEXT: nop
+;
; MIPSEL-LABEL: test_umin_8:
; MIPSEL: # %bb.0: # %entry
; MIPSEL-NEXT: addiu $sp, $sp, -8
@@ -4366,8 +4793,6 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB11_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
-; MIPSEL-NEXT: and $2, $2, $8
-; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -4407,8 +4832,6 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB11_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
-; MIPSELR6-NEXT: and $2, $2, $8
-; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -4447,8 +4870,6 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB11_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
-; MMEL-NEXT: and $2, $2, $8
-; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -4486,8 +4907,6 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB11_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
-; MMELR6-NEXT: and $2, $2, $8
-; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -4605,8 +5024,6 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB11_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
-; MIPS64EL-NEXT: and $2, $2, $8
-; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -4646,8 +5063,6 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB11_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
-; MIPS64ELR6-NEXT: and $2, $2, $8
-; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
>From 0e501dbd932ef1c6f4e747c83bf33beef0a09ecf Mon Sep 17 00:00:00 2001
From: yingopq <115543042+yingopq at users.noreply.github.com>
Date: Sun, 24 Mar 2024 14:35:42 +0800
Subject: [PATCH 2/2] [Mips] Restore wrong deletion of instruction 'and' in
unsigned min/max processing. (#85902)
Fix #61881
(cherry picked from commit 5d7fd6a04a6748936dece9d90481b2ba4ec97e53)
---
llvm/lib/Target/Mips/MipsExpandPseudo.cpp | 9 ++++
llvm/test/CodeGen/Mips/atomic-min-max.ll | 56 +++++++++++++++++++++++
2 files changed, 65 insertions(+)
diff --git a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
index bded59439a736a..c30129743a9626 100644
--- a/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
+++ b/llvm/lib/Target/Mips/MipsExpandPseudo.cpp
@@ -500,6 +500,15 @@ bool MipsExpandPseudo::expandAtomicBinOpSubword(
.addReg(Incr, RegState::Kill)
.addImm(ShiftImm);
}
+ } else {
+ // and OldVal, OldVal, Mask
+ // and Incr, Incr, Mask
+ BuildMI(loopMBB, DL, TII->get(Mips::AND), OldVal)
+ .addReg(OldVal)
+ .addReg(Mask);
+ BuildMI(loopMBB, DL, TII->get(Mips::AND), Incr)
+ .addReg(Incr)
+ .addReg(Mask);
}
}
// unsigned: sltu Scratch4, oldVal, Incr
diff --git a/llvm/test/CodeGen/Mips/atomic-min-max.ll b/llvm/test/CodeGen/Mips/atomic-min-max.ll
index bc3643f3947a40..a96581bdb39a4c 100644
--- a/llvm/test/CodeGen/Mips/atomic-min-max.ll
+++ b/llvm/test/CodeGen/Mips/atomic-min-max.ll
@@ -2146,6 +2146,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: $BB6_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
; MIPS32-NEXT: sltu $5, $2, $7
; MIPS32-NEXT: move $3, $2
; MIPS32-NEXT: movn $3, $7, $5
@@ -2186,6 +2188,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB6_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
+; MIPSEL-NEXT: and $2, $2, $8
+; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -2225,6 +2229,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB6_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
+; MIPSELR6-NEXT: and $2, $2, $8
+; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -2263,6 +2269,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB6_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
+; MMEL-NEXT: and $2, $2, $8
+; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -2300,6 +2308,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB6_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
+; MMELR6-NEXT: and $2, $2, $8
+; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -2417,6 +2427,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB6_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
+; MIPS64EL-NEXT: and $2, $2, $8
+; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -2456,6 +2468,8 @@ define i16 @test_umax_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB6_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
+; MIPS64ELR6-NEXT: and $2, $2, $8
+; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -2655,6 +2669,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS32-NEXT: $BB7_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
; MIPS32-NEXT: sltu $5, $2, $7
; MIPS32-NEXT: move $3, $2
; MIPS32-NEXT: movz $3, $7, $5
@@ -2696,6 +2712,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSEL-NEXT: $BB7_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
+; MIPSEL-NEXT: and $2, $2, $8
+; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -2735,6 +2753,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPSELR6-NEXT: $BB7_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
+; MIPSELR6-NEXT: and $2, $2, $8
+; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -2773,6 +2793,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMEL-NEXT: $BB7_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
+; MMEL-NEXT: and $2, $2, $8
+; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -2810,6 +2832,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MMELR6-NEXT: $BB7_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
+; MMELR6-NEXT: and $2, $2, $8
+; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -2927,6 +2951,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64EL-NEXT: .LBB7_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
+; MIPS64EL-NEXT: and $2, $2, $8
+; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -2966,6 +2992,8 @@ define i16 @test_umin_16(ptr nocapture %ptr, i16 signext %val) {
; MIPS64ELR6-NEXT: .LBB7_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
+; MIPS64ELR6-NEXT: and $2, $2, $8
+; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
@@ -4244,6 +4272,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: $BB10_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
; MIPS32-NEXT: sltu $5, $2, $7
; MIPS32-NEXT: move $3, $2
; MIPS32-NEXT: movn $3, $7, $5
@@ -4284,6 +4314,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB10_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
+; MIPSEL-NEXT: and $2, $2, $8
+; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movn $3, $7, $5
@@ -4323,6 +4355,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB10_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
+; MIPSELR6-NEXT: and $2, $2, $8
+; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: seleqz $3, $2, $5
; MIPSELR6-NEXT: selnez $5, $7, $5
@@ -4361,6 +4395,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB10_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
+; MMEL-NEXT: and $2, $2, $8
+; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movn $3, $7, $5
@@ -4398,6 +4434,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB10_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
+; MMELR6-NEXT: and $2, $2, $8
+; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: seleqz $3, $2, $5
; MMELR6-NEXT: selnez $5, $7, $5
@@ -4515,6 +4553,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB10_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
+; MIPS64EL-NEXT: and $2, $2, $8
+; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movn $3, $7, $5
@@ -4554,6 +4594,8 @@ define i8 @test_umax_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB10_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
+; MIPS64ELR6-NEXT: and $2, $2, $8
+; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: seleqz $3, $2, $5
; MIPS64ELR6-NEXT: selnez $5, $7, $5
@@ -4753,6 +4795,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS32-NEXT: $BB11_1: # %entry
; MIPS32-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS32-NEXT: ll $2, 0($6)
+; MIPS32-NEXT: and $2, $2, $8
+; MIPS32-NEXT: and $7, $7, $8
; MIPS32-NEXT: sltu $5, $2, $7
; MIPS32-NEXT: move $3, $2
; MIPS32-NEXT: movz $3, $7, $5
@@ -4793,6 +4837,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSEL-NEXT: $BB11_1: # %entry
; MIPSEL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSEL-NEXT: ll $2, 0($6)
+; MIPSEL-NEXT: and $2, $2, $8
+; MIPSEL-NEXT: and $7, $7, $8
; MIPSEL-NEXT: sltu $5, $2, $7
; MIPSEL-NEXT: move $3, $2
; MIPSEL-NEXT: movz $3, $7, $5
@@ -4832,6 +4878,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPSELR6-NEXT: $BB11_1: # %entry
; MIPSELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPSELR6-NEXT: ll $2, 0($6)
+; MIPSELR6-NEXT: and $2, $2, $8
+; MIPSELR6-NEXT: and $7, $7, $8
; MIPSELR6-NEXT: sltu $5, $2, $7
; MIPSELR6-NEXT: selnez $3, $2, $5
; MIPSELR6-NEXT: seleqz $5, $7, $5
@@ -4870,6 +4918,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMEL-NEXT: $BB11_1: # %entry
; MMEL-NEXT: # =>This Inner Loop Header: Depth=1
; MMEL-NEXT: ll $2, 0($6)
+; MMEL-NEXT: and $2, $2, $8
+; MMEL-NEXT: and $7, $7, $8
; MMEL-NEXT: sltu $5, $2, $7
; MMEL-NEXT: or $3, $2, $zero
; MMEL-NEXT: movz $3, $7, $5
@@ -4907,6 +4957,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MMELR6-NEXT: $BB11_1: # %entry
; MMELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MMELR6-NEXT: ll $2, 0($6)
+; MMELR6-NEXT: and $2, $2, $8
+; MMELR6-NEXT: and $7, $7, $8
; MMELR6-NEXT: sltu $5, $2, $7
; MMELR6-NEXT: selnez $3, $2, $5
; MMELR6-NEXT: seleqz $5, $7, $5
@@ -5024,6 +5076,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64EL-NEXT: .LBB11_1: # %entry
; MIPS64EL-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64EL-NEXT: ll $2, 0($6)
+; MIPS64EL-NEXT: and $2, $2, $8
+; MIPS64EL-NEXT: and $7, $7, $8
; MIPS64EL-NEXT: sltu $5, $2, $7
; MIPS64EL-NEXT: move $3, $2
; MIPS64EL-NEXT: movz $3, $7, $5
@@ -5063,6 +5117,8 @@ define i8 @test_umin_8(ptr nocapture %ptr, i8 signext %val) {
; MIPS64ELR6-NEXT: .LBB11_1: # %entry
; MIPS64ELR6-NEXT: # =>This Inner Loop Header: Depth=1
; MIPS64ELR6-NEXT: ll $2, 0($6)
+; MIPS64ELR6-NEXT: and $2, $2, $8
+; MIPS64ELR6-NEXT: and $7, $7, $8
; MIPS64ELR6-NEXT: sltu $5, $2, $7
; MIPS64ELR6-NEXT: selnez $3, $2, $5
; MIPS64ELR6-NEXT: seleqz $5, $7, $5
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