[llvm-branch-commits] [clang] [lld] [llvm] SystemZ release notes for 18.x. (PR #84560)
Jonas Paulsson via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Mar 8 12:33:54 PST 2024
https://github.com/JonPsson1 created https://github.com/llvm/llvm-project/pull/84560
None
>From b6bd83cace58517531380eb4e34594bddc973153 Mon Sep 17 00:00:00 2001
From: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: Fri, 8 Mar 2024 15:28:56 -0500
Subject: [PATCH] SystemZ release notes.
---
clang/docs/ReleaseNotes.rst | 5 +++++
lld/docs/ReleaseNotes.rst | 6 ++++++
llvm/docs/ReleaseNotes.rst | 10 ++++++++++
3 files changed, 21 insertions(+)
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index fc27297aea2d6c..6a038ed4b635c7 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -1325,6 +1325,11 @@ AIX Support
or newer. Similar to the LTO support on AIX, ThinLTO is implemented with
the libLTO.so plugin.
+SystemZ Support
+^^^^^^^^^^^^^^^
+- Properly support 16 byte atomic int/fp types and ops. Atomic __int128 (and
+ long double) variables are now aligned to 16 bytes by default (like gcc 14).
+
WebAssembly Support
^^^^^^^^^^^^^^^^^^^
diff --git a/lld/docs/ReleaseNotes.rst b/lld/docs/ReleaseNotes.rst
index 56ba3463aeadc0..4de33363d0532b 100644
--- a/lld/docs/ReleaseNotes.rst
+++ b/lld/docs/ReleaseNotes.rst
@@ -163,5 +163,11 @@ WebAssembly Improvements
is read from object files within the archive. This matches the behaviour of
the ELF linker.
+SystemZ
+-------
+
+* Add target support for SystemZ (s390x).
+
+
Fixes
#####
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index 5b3210138f2f89..7cfa83fc8b0565 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -215,6 +215,16 @@ Changes to the RISC-V Backend
* ``-mcpu=sifive-p670`` was added.
* Support for the Zicond extension is no longer experimental.
+Changes to the SystemZ Backend
+------------------------------
+
+* Properly support 16 byte atomic int/fp types and ops.
+* Support i128 as legal type in VRs.
+* Add an i128 cost model.
+* Support building individual functions with backchain using the
+ __attribute__((target("backchain"))) syntax.
+* Add exception handling for XPLINK.
+
Changes to the WebAssembly Backend
----------------------------------
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