[llvm-branch-commits] [llvm] [SPARC][IAS] Add named prefetch tag constants (PR #94249)
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Sun Jun 9 08:09:24 PDT 2024
https://github.com/koachan updated https://github.com/llvm/llvm-project/pull/94249
>From 00cd31f7c2d92a07814f806898a5fd605c07c615 Mon Sep 17 00:00:00 2001
From: Koakuma <koachan at protonmail.com>
Date: Mon, 3 Jun 2024 23:28:55 +0700
Subject: [PATCH 1/2] =?UTF-8?q?[=F0=9D=98=80=F0=9D=97=BD=F0=9D=97=BF]=20ch?=
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Created using spr 1.3.4
[skip ci]
---
.../Target/Sparc/AsmParser/SparcAsmParser.cpp | 11 ++-
.../Target/Sparc/MCTargetDesc/SparcMCExpr.cpp | 78 ++++++++++---------
llvm/lib/Target/Sparc/SparcInstrAliases.td | 11 ++-
llvm/test/MC/Sparc/sparc-relocations.s | 10 +++
llvm/test/MC/Sparc/sparcv9-instructions.s | 14 ++++
5 files changed, 81 insertions(+), 43 deletions(-)
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index 185b2fe90c6cb..e4f5c64f9d00e 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -1384,12 +1384,11 @@ MCRegister SparcAsmParser::matchRegisterName(const AsmToken &Tok,
}
// JPS1 extension - aliases for ASRs
- // Section A.51 - Read State Register
+ // Section 5.2.11 - Ancillary State Registers (ASRs)
if (Name == "pcr") {
RegKind = SparcOperand::rk_Special;
return SP::ASR16;
}
-
if (Name == "pic") {
RegKind = SparcOperand::rk_Special;
return SP::ASR17;
@@ -1402,6 +1401,14 @@ MCRegister SparcAsmParser::matchRegisterName(const AsmToken &Tok,
RegKind = SparcOperand::rk_Special;
return SP::ASR19;
}
+ if (Name == "set_softint") {
+ RegKind = SparcOperand::rk_Special;
+ return SP::ASR20;
+ }
+ if (Name == "clear_softint") {
+ RegKind = SparcOperand::rk_Special;
+ return SP::ASR21;
+ }
if (Name == "softint") {
RegKind = SparcOperand::rk_Special;
return SP::ASR22;
diff --git a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
index 522a8877a1c60..4688837e435e5 100644
--- a/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
+++ b/llvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
@@ -93,44 +93,46 @@ bool SparcMCExpr::printVariantKind(raw_ostream &OS, VariantKind Kind)
SparcMCExpr::VariantKind SparcMCExpr::parseVariantKind(StringRef name)
{
return StringSwitch<SparcMCExpr::VariantKind>(name)
- .Case("lo", VK_Sparc_LO)
- .Case("hi", VK_Sparc_HI)
- .Case("h44", VK_Sparc_H44)
- .Case("m44", VK_Sparc_M44)
- .Case("l44", VK_Sparc_L44)
- .Case("hh", VK_Sparc_HH)
- .Case("hm", VK_Sparc_HM)
- .Case("lm", VK_Sparc_LM)
- .Case("pc22", VK_Sparc_PC22)
- .Case("pc10", VK_Sparc_PC10)
- .Case("got22", VK_Sparc_GOT22)
- .Case("got10", VK_Sparc_GOT10)
- .Case("got13", VK_Sparc_GOT13)
- .Case("r_disp32", VK_Sparc_R_DISP32)
- .Case("tgd_hi22", VK_Sparc_TLS_GD_HI22)
- .Case("tgd_lo10", VK_Sparc_TLS_GD_LO10)
- .Case("tgd_add", VK_Sparc_TLS_GD_ADD)
- .Case("tgd_call", VK_Sparc_TLS_GD_CALL)
- .Case("tldm_hi22", VK_Sparc_TLS_LDM_HI22)
- .Case("tldm_lo10", VK_Sparc_TLS_LDM_LO10)
- .Case("tldm_add", VK_Sparc_TLS_LDM_ADD)
- .Case("tldm_call", VK_Sparc_TLS_LDM_CALL)
- .Case("tldo_hix22", VK_Sparc_TLS_LDO_HIX22)
- .Case("tldo_lox10", VK_Sparc_TLS_LDO_LOX10)
- .Case("tldo_add", VK_Sparc_TLS_LDO_ADD)
- .Case("tie_hi22", VK_Sparc_TLS_IE_HI22)
- .Case("tie_lo10", VK_Sparc_TLS_IE_LO10)
- .Case("tie_ld", VK_Sparc_TLS_IE_LD)
- .Case("tie_ldx", VK_Sparc_TLS_IE_LDX)
- .Case("tie_add", VK_Sparc_TLS_IE_ADD)
- .Case("tle_hix22", VK_Sparc_TLS_LE_HIX22)
- .Case("tle_lox10", VK_Sparc_TLS_LE_LOX10)
- .Case("hix", VK_Sparc_HIX22)
- .Case("lox", VK_Sparc_LOX10)
- .Case("gdop_hix22", VK_Sparc_GOTDATA_HIX22)
- .Case("gdop_lox10", VK_Sparc_GOTDATA_LOX10)
- .Case("gdop", VK_Sparc_GOTDATA_OP)
- .Default(VK_Sparc_None);
+ .Case("lo", VK_Sparc_LO)
+ .Case("hi", VK_Sparc_HI)
+ .Case("h44", VK_Sparc_H44)
+ .Case("m44", VK_Sparc_M44)
+ .Case("l44", VK_Sparc_L44)
+ .Case("hh", VK_Sparc_HH)
+ .Case("uhi", VK_Sparc_HH) // Nonstandard GNU extension
+ .Case("hm", VK_Sparc_HM)
+ .Case("ulo", VK_Sparc_HM) // Nonstandard GNU extension
+ .Case("lm", VK_Sparc_LM)
+ .Case("pc22", VK_Sparc_PC22)
+ .Case("pc10", VK_Sparc_PC10)
+ .Case("got22", VK_Sparc_GOT22)
+ .Case("got10", VK_Sparc_GOT10)
+ .Case("got13", VK_Sparc_GOT13)
+ .Case("r_disp32", VK_Sparc_R_DISP32)
+ .Case("tgd_hi22", VK_Sparc_TLS_GD_HI22)
+ .Case("tgd_lo10", VK_Sparc_TLS_GD_LO10)
+ .Case("tgd_add", VK_Sparc_TLS_GD_ADD)
+ .Case("tgd_call", VK_Sparc_TLS_GD_CALL)
+ .Case("tldm_hi22", VK_Sparc_TLS_LDM_HI22)
+ .Case("tldm_lo10", VK_Sparc_TLS_LDM_LO10)
+ .Case("tldm_add", VK_Sparc_TLS_LDM_ADD)
+ .Case("tldm_call", VK_Sparc_TLS_LDM_CALL)
+ .Case("tldo_hix22", VK_Sparc_TLS_LDO_HIX22)
+ .Case("tldo_lox10", VK_Sparc_TLS_LDO_LOX10)
+ .Case("tldo_add", VK_Sparc_TLS_LDO_ADD)
+ .Case("tie_hi22", VK_Sparc_TLS_IE_HI22)
+ .Case("tie_lo10", VK_Sparc_TLS_IE_LO10)
+ .Case("tie_ld", VK_Sparc_TLS_IE_LD)
+ .Case("tie_ldx", VK_Sparc_TLS_IE_LDX)
+ .Case("tie_add", VK_Sparc_TLS_IE_ADD)
+ .Case("tle_hix22", VK_Sparc_TLS_LE_HIX22)
+ .Case("tle_lox10", VK_Sparc_TLS_LE_LOX10)
+ .Case("hix", VK_Sparc_HIX22)
+ .Case("lox", VK_Sparc_LOX10)
+ .Case("gdop_hix22", VK_Sparc_GOTDATA_HIX22)
+ .Case("gdop_lox10", VK_Sparc_GOTDATA_LOX10)
+ .Case("gdop", VK_Sparc_GOTDATA_OP)
+ .Default(VK_Sparc_None);
}
Sparc::Fixups SparcMCExpr::getFixupKind(SparcMCExpr::VariantKind Kind) {
diff --git a/llvm/lib/Target/Sparc/SparcInstrAliases.td b/llvm/lib/Target/Sparc/SparcInstrAliases.td
index db4c05cf18062..2b9244519f154 100644
--- a/llvm/lib/Target/Sparc/SparcInstrAliases.td
+++ b/llvm/lib/Target/Sparc/SparcInstrAliases.td
@@ -560,11 +560,16 @@ def : InstAlias<"mov $simm13, %tbr", (WRTBRri G0, simm13Op:$simm13), 0>;
// End of Section A.3
-// or imm, reg, rd -> or reg, imm, rd
-// Nonstandard GNU extension.
-let EmitPriority = 0 in
+
+// Nonstandard GNU extensions.
+let EmitPriority = 0 in {
+ // or imm, reg, rd -> or reg, imm, rd
def : InstAlias<"or $simm13, $rs1, $rd", (ORri IntRegs:$rd, IntRegs:$rs1, simm13Op:$simm13)>;
+ // addc/addx imm, reg, rd -> or reg, imm, rd
+ def : InstAlias<"addx $simm13, $rs1, $rd", (ADDCri IntRegs:$rd, IntRegs:$rs1, simm13Op:$simm13)>;
+}
+
// wr reg_or_imm, specialreg -> wr %g0, reg_or_imm, specialreg
// (aka: omit the first arg when it's g0. This is not in the manual, but is
// supported by gnu and solaris as)
diff --git a/llvm/test/MC/Sparc/sparc-relocations.s b/llvm/test/MC/Sparc/sparc-relocations.s
index d99ddb7e2f802..82314e440acf6 100644
--- a/llvm/test/MC/Sparc/sparc-relocations.s
+++ b/llvm/test/MC/Sparc/sparc-relocations.s
@@ -10,6 +10,8 @@
! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_M44 sym
! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_L44 sym
! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_HH22 sym
+ ! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_HH22 sym
+ ! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_HM10 sym
! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_HM10 sym
! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_LM22 sym
! CHECK-OBJ-NEXT: 0x{{[0-9,A-F]+}} R_SPARC_13 sym
@@ -49,10 +51,18 @@
! CHECK-NEXT: ! fixup A - offset: 0, value: %hh(sym), kind: fixup_sparc_hh
sethi %hh(sym), %l0
+ ! CHECK: sethi %hh(sym), %l0 ! encoding: [0x21,0b00AAAAAA,A,A]
+ ! CHECK-NEXT: ! fixup A - offset: 0, value: %hh(sym), kind: fixup_sparc_hh
+ sethi %uhi(sym), %l0
+
! CHECK: or %g1, %hm(sym), %g3 ! encoding: [0x86,0x10,0b011000AA,A]
! CHECK-NEXT: ! fixup A - offset: 0, value: %hm(sym), kind: fixup_sparc_hm
or %g1, %hm(sym), %g3
+ ! CHECK: or %g1, %hm(sym), %g3 ! encoding: [0x86,0x10,0b011000AA,A]
+ ! CHECK-NEXT: ! fixup A - offset: 0, value: %hm(sym), kind: fixup_sparc_hm
+ or %g1, %ulo(sym), %g3
+
! CHECK: sethi %lm(sym), %l0 ! encoding: [0x21,0b00AAAAAA,A,A]
! CHECK-NEXT: ! fixup A - offset: 0, value: %lm(sym), kind: fixup_sparc_lm
sethi %lm(sym), %l0
diff --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s
index 0ca2e50989ca9..d461c82467471 100644
--- a/llvm/test/MC/Sparc/sparcv9-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -6,6 +6,16 @@
! V9: addx %g2, %g1, %g3 ! encoding: [0x86,0x40,0x80,0x01]
addc %g2, %g1, %g3
+ ! V8: error: invalid instruction mnemonic
+ ! V8-NEXT: addc %g2, 1, %g3
+ ! V9: addx %g2, 1, %g3 ! encoding: [0x86,0x40,0xa0,0x01]
+ addc %g2, 1, %g3
+
+ ! V8: error: invalid instruction mnemonic
+ ! V8-NEXT: addc 1, %g2, %g3
+ ! V9: addx %g2, 1, %g3 ! encoding: [0x86,0x40,0xa0,0x01]
+ addc 1, %g2, %g3
+
! V8: error: invalid instruction mnemonic
! V8-NEXT: addccc %g1, %g2, %g3
! V9: addxcc %g1, %g2, %g3 ! encoding: [0x86,0xc0,0x40,0x02]
@@ -492,6 +502,10 @@
wr %i0, %i1, %ccr
! V9: wr %i0, 1, %ccr ! encoding: [0x85,0x86,0x20,0x01]
wr %i0, 1, %ccr
+ ! V9: wr %i0, 1, %asr20 ! encoding: [0xa9,0x86,0x20,0x01]
+ wr %i0, 1, %set_softint
+ ! V9: wr %i0, 1, %asr21 ! encoding: [0xab,0x86,0x20,0x01]
+ wr %i0, 1, %clear_softint
! V9: st %o1, [%o0] ! encoding: [0xd2,0x22,0x00,0x00]
stw %o1, [%o0]
>From 2debba6d10e3025ae5b312ef8ef8e1f68bc2b794 Mon Sep 17 00:00:00 2001
From: Koakuma <koachan at protonmail.com>
Date: Tue, 4 Jun 2024 22:30:09 +0700
Subject: [PATCH 2/2] Update tests and apply suggestions
Created using spr 1.3.4
---
.../Target/Sparc/AsmParser/SparcAsmParser.cpp | 28 ++++--
llvm/test/MC/Disassembler/Sparc/sparc-v9.txt | 58 +++++++++++-
llvm/test/MC/Sparc/sparcv9-instructions.s | 90 +++++++++++++++++++
3 files changed, 165 insertions(+), 11 deletions(-)
diff --git a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index a0dec24e3200a..f0a3a4e88b30c 100644
--- a/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/llvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -1120,23 +1120,33 @@ ParseStatus SparcAsmParser::parsePrefetchTag(OperandVector &Operands) {
SMLoc E = Parser.getTok().getEndLoc();
int64_t PrefetchVal = 0;
- if (getLexer().getKind() == AsmToken::Hash) {
+ switch (getLexer().getKind()) {
+ case AsmToken::LParen:
+ case AsmToken::Integer:
+ case AsmToken::Identifier:
+ case AsmToken::Plus:
+ case AsmToken::Minus:
+ case AsmToken::Tilde:
+ if (getParser().parseAbsoluteExpression(PrefetchVal) ||
+ !isUInt<5>(PrefetchVal))
+ return Error(S, "invalid prefetch number, must be between 0 and 31");
+ break;
+ case AsmToken::Hash: {
SMLoc TagStart = getLexer().peekTok(false).getLoc();
Parser.Lex(); // Eat the '#'.
- auto PrefetchName = Parser.getTok().getString();
- auto PrefetchTag = SparcPrefetchTag::lookupPrefetchTagByName(PrefetchName);
+ const StringRef PrefetchName = Parser.getTok().getString();
+ const SparcPrefetchTag::PrefetchTag *PrefetchTag =
+ SparcPrefetchTag::lookupPrefetchTagByName(PrefetchName);
Parser.Lex(); // Eat the identifier token.
if (!PrefetchTag)
return Error(TagStart, "unknown prefetch tag");
PrefetchVal = PrefetchTag->Encoding;
- } else if (!getParser().parseAbsoluteExpression(PrefetchVal)) {
- if (!isUInt<5>(PrefetchVal))
- return Error(S, "invalid prefetch number, must be between 0 and 31");
- } else {
- return Error(S, "malformed prefetch tag, must be a constant integer "
- "expression, or a named tag");
+ break;
+ }
+ default:
+ return ParseStatus::NoMatch;
}
Operands.push_back(SparcOperand::CreatePrefetchTag(PrefetchVal, S, E));
diff --git a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
index 49b6e339435f1..d561216fec6f2 100644
--- a/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
+++ b/llvm/test/MC/Disassembler/Sparc/sparc-v9.txt
@@ -132,11 +132,65 @@
# CHECK: membar #LoadLoad | #StoreLoad | #LoadStore | #StoreStore | #Lookaside | #MemIssue | #Sync
0x81 0x43 0xe0 0x7f
+# CHECK: prefetch [%i1+3968], #n_reads
+0xc1 0x6e 0x6f 0x80
+
# CHECK: prefetch [%i1+3968], #one_read
-0xc3,0x6e,0x6f,0x80
+0xc3 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #n_writes
+0xc5 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #one_write
+0xc7 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #page
+0xc9 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #unified
+0xe3 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #n_reads_strong
+0xe9 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #one_read_strong
+0xeb 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #n_writes_strong
+0xed 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+3968], #one_write_strong
+0xef 0x6e 0x6f 0x80
+
+# CHECK: prefetch [%i1+%i2], #n_reads
+0xc1 0x6e 0x40 0x1a
# CHECK: prefetch [%i1+%i2], #one_read
-0xc3,0x6e,0x40,0x1a
+0xc3 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #n_writes
+0xc5 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #one_write
+0xc7 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #page
+0xc9 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #unified
+0xe3 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #n_reads_strong
+0xe9 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #one_read_strong
+0xeb 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #n_writes_strong
+0xed 0x6e 0x40 0x1a
+
+# CHECK: prefetch [%i1+%i2], #one_write_strong
+0xef 0x6e 0x40 0x1a
# CHECK: done
0x81,0xf0,0x00,0x00
diff --git a/llvm/test/MC/Sparc/sparcv9-instructions.s b/llvm/test/MC/Sparc/sparcv9-instructions.s
index f0348eb70f1c5..80f67ac30bc82 100644
--- a/llvm/test/MC/Sparc/sparcv9-instructions.s
+++ b/llvm/test/MC/Sparc/sparcv9-instructions.s
@@ -542,21 +542,111 @@
! V9: prefetch [%i1+3968], #one_read ! encoding: [0xc3,0x6e,0x6f,0x80]
prefetch [ %i1 + 0xf80 ], 1
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #n_reads
+ ! V9: prefetch [%i1+3968], #n_reads ! encoding: [0xc1,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #n_reads
+
! V8: error: unexpected token
! V8-NEXT: prefetch [ %i1 + 0xf80 ], #one_read
! V9: prefetch [%i1+3968], #one_read ! encoding: [0xc3,0x6e,0x6f,0x80]
prefetch [ %i1 + 0xf80 ], #one_read
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #n_writes
+ ! V9: prefetch [%i1+3968], #n_writes ! encoding: [0xc5,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #n_writes
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #one_write
+ ! V9: prefetch [%i1+3968], #one_write ! encoding: [0xc7,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #one_write
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #page
+ ! V9: prefetch [%i1+3968], #page ! encoding: [0xc9,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #page
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #unified
+ ! V9: prefetch [%i1+3968], #unified ! encoding: [0xe3,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #unified
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #n_reads_strong
+ ! V9: prefetch [%i1+3968], #n_reads_strong ! encoding: [0xe9,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #n_reads_strong
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #one_read_strong
+ ! V9: prefetch [%i1+3968], #one_read_strong ! encoding: [0xeb,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #one_read_strong
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #n_writes_strong
+ ! V9: prefetch [%i1+3968], #n_writes_strong ! encoding: [0xed,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #n_writes_strong
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + 0xf80 ], #one_write_strong
+ ! V9: prefetch [%i1+3968], #one_write_strong ! encoding: [0xef,0x6e,0x6f,0x80]
+ prefetch [ %i1 + 0xf80 ], #one_write_strong
+
! V8: error: invalid operand for instruction
! V8-NEXT: prefetch [ %i1 + %i2 ], 1
! V9: prefetch [%i1+%i2], #one_read ! encoding: [0xc3,0x6e,0x40,0x1a]
prefetch [ %i1 + %i2 ], 1
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #n_reads
+ ! V9: prefetch [%i1+%i2], #n_reads ! encoding: [0xc1,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #n_reads
+
! V8: error: unexpected token
! V8-NEXT: prefetch [ %i1 + %i2 ], #one_read
! V9: prefetch [%i1+%i2], #one_read ! encoding: [0xc3,0x6e,0x40,0x1a]
prefetch [ %i1 + %i2 ], #one_read
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #n_writes
+ ! V9: prefetch [%i1+%i2], #n_writes ! encoding: [0xc5,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #n_writes
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #one_write
+ ! V9: prefetch [%i1+%i2], #one_write ! encoding: [0xc7,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #one_write
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #page
+ ! V9: prefetch [%i1+%i2], #page ! encoding: [0xc9,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #page
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #unified
+ ! V9: prefetch [%i1+%i2], #unified ! encoding: [0xe3,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #unified
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #n_reads_strong
+ ! V9: prefetch [%i1+%i2], #n_reads_strong ! encoding: [0xe9,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #n_reads_strong
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #one_read_strong
+ ! V9: prefetch [%i1+%i2], #one_read_strong ! encoding: [0xeb,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #one_read_strong
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #n_writes_strong
+ ! V9: prefetch [%i1+%i2], #n_writes_strong ! encoding: [0xed,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #n_writes_strong
+
+ ! V8: error: unexpected token
+ ! V8-NEXT: prefetch [ %i1 + %i2 ], #one_write_strong
+ ! V9: prefetch [%i1+%i2], #one_write_strong ! encoding: [0xef,0x6e,0x40,0x1a]
+ prefetch [ %i1 + %i2 ], #one_write_strong
+
! V8: error: instruction requires a CPU feature not currently enabled
! V8-NEXT: done
! V9: done ! encoding: [0x81,0xf0,0x00,0x00]
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