[llvm-branch-commits] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN, SMAX, UMIN, UMAX} for odd-sized vectors (PR #81831)
Dhruv Chawla via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Fri Feb 23 00:15:50 PST 2024
dc03-work wrote:
Merged with #81830 in #82740
https://github.com/llvm/llvm-project/pull/81831
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