[llvm-branch-commits] [RISCV] Support llvm.readsteadycounter intrinsic (PR #82322)

[Wang Pengcheng via llvm-branch-commits]

https://github.com/wangpc-pp created https://github.com/llvm/llvm-project/pull/82322

This intrinsic was introduced by #81331, which is a lot like
`llvm.readcyclecounter`.

For the RISCV implementation, we rename `ReadCycleWide` pseudo to
`ReadCounterWide` and make it accept two operands (the low and high
parts of the counter). As for legalization and lowering parts, we
reuse the code of `ISD::READCYCLECOUNTER` (make it able to handle
both intrinsics).

Tests using Clang builtins are runned on real hardware and it works
as excepted.