[llvm-branch-commits] [AArch64][GlobalISel] Improve codegen for G_VECREDUCE_{SMIN, SMAX, UMIN, UMAX} for odd-sized vectors (PR #81831)

[Dhruv Chawla via llvm-branch-commits]

dc03-work wrote:

This PR is stacked on top of https://github.com/llvm/llvm-project/pull/81830. Sorry for the long branch names on both, I do not know how to change the default branch names with SPR

https://github.com/llvm/llvm-project/pull/81831