[llvm-branch-commits] [AArch64][GlobalISel] Fix legalization for <4 x i1> vector stores. (PR #121185)

[Amara Emerson via llvm-branch-commits]

https://github.com/aemerson created https://github.com/llvm/llvm-project/pull/121185

This case is different from the earlier <8 x i1> case handled because it triggers
a legalization failure in lowerStore() that's intended for scalar code.

It also was triggering incorrect bitcast actions in the AArch64 rules that weren't
expecting truncating stores.

With these two fixed, more cases are handled. The code is still bad, including
some missing load promotion in our combiners that result in dead stores hanging
around at the end of codegen. Again, we can fix these in separate changes.