[llvm-branch-commits] [llvm] [X86] Add atomic vector tests for >1 sizes. (PR #120387)

Matt Arsenault via llvm-branch-commits llvm-branch-commits at lists.llvm.org
Wed Dec 18 20:05:18 PST 2024


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@@ -155,3 +183,214 @@ define <1 x float> @atomic_vec1_float(ptr %x) {
   %ret = load atomic <1 x float>, ptr %x acquire, align 4
   ret <1 x float> %ret
 }
+
+define <1 x i64> @atomic_vec1_i64(ptr %x) nounwind {
+; CHECK3-LABEL: atomic_vec1_i64:
+; CHECK3:       ## %bb.0:
+; CHECK3-NEXT:    pushq %rax
+; CHECK3-NEXT:    movq %rdi, %rsi
+; CHECK3-NEXT:    movq %rsp, %rdx
+; CHECK3-NEXT:    movl $8, %edi
+; CHECK3-NEXT:    movl $2, %ecx
+; CHECK3-NEXT:    callq ___atomic_load
+; CHECK3-NEXT:    movq (%rsp), %rax
+; CHECK3-NEXT:    popq %rcx
+; CHECK3-NEXT:    retq
+;
+; CHECK0-LABEL: atomic_vec1_i64:
+; CHECK0:       ## %bb.0:
+; CHECK0-NEXT:    pushq %rax
+; CHECK0-NEXT:    movq %rdi, %rsi
+; CHECK0-NEXT:    movl $8, %edi
+; CHECK0-NEXT:    movq %rsp, %rdx
+; CHECK0-NEXT:    movl $2, %ecx
+; CHECK0-NEXT:    callq ___atomic_load
+; CHECK0-NEXT:    movq (%rsp), %rax
+; CHECK0-NEXT:    popq %rcx
+; CHECK0-NEXT:    retq
+  %ret = load atomic <1 x i64>, ptr %x acquire, align 4
----------------
arsenm wrote:

Same, another under aligned case 

https://github.com/llvm/llvm-project/pull/120387


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