[llvm-branch-commits] [llvm] [SelectionDAG] Legalize <1 x T> vector types for atomic load (PR #120385)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Dec 18 17:32:12 PST 2024
arsenm wrote:
> crashes with:
>
> ```
> WidenVectorResult #0: t3: v2i32,ch = AtomicLoad<(load acquire (s64) from %ir.x, align 64)> t0, t2
> LLVM ERROR: Do not know how to widen the result of this operator!
> ```
At this PR, this is the expectation. A later PR needs to handle the other vector legalization cases
https://github.com/llvm/llvm-project/pull/120385
More information about the llvm-branch-commits
mailing list