[llvm-branch-commits] [lldb][Process] Introduce LoongArch64 hw break/watchpoint support (PR #118770)

[David Spickett via llvm-branch-commits]

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@@ -0,0 +1,170 @@
+//===-- NativeRegisterContextDBReg_loongarch.cpp --------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "NativeRegisterContextDBReg_loongarch.h"
+
+#include "lldb/Utility/LLDBLog.h"
+#include "lldb/Utility/Log.h"
+#include "lldb/Utility/RegisterValue.h"
+
+using namespace lldb_private;
+
+uint32_t
+NativeRegisterContextDBReg_loongarch::SetHardwareBreakpoint(lldb::addr_t addr,
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DavidSpickett wrote:

I'm surprised this is not in the base class.

I suppose it's like for Arm64 where the control value is the enable bit from the base class, plus some extra arch specific things.

Perhaps once you've added a generic MakeControlValue this can be removed. You might want a "ValidateBreakpoint" as well to handle size and alignment.

https://github.com/llvm/llvm-project/pull/118770