[llvm-branch-commits] [llvm] 30b2408 - Revert "[Attributor] Fix an issue that an access is skipped by mistake (#101862)"

[via llvm-branch-commits]

Author: Shilei Tian
Date: 2024-08-06T21:30:14-04:00
New Revision: 30b2408fe12faf6ac90a1a709750425ffd752a8c

URL: https://github.com/llvm/llvm-project/commit/30b2408fe12faf6ac90a1a709750425ffd752a8c
DIFF: https://github.com/llvm/llvm-project/commit/30b2408fe12faf6ac90a1a709750425ffd752a8c.diff

LOG: Revert "[Attributor] Fix an issue that an access is skipped by mistake (#101862)"

This reverts commit 53d33d3ba5eedac8fccb9d36576cd667800a4a38.

Added: 
    

Modified: 
    llvm/lib/Transforms/IPO/AttributorAttributes.cpp

Removed: 
    llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll


################################################################################
diff  --git a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
index db5e94806e9a16..77026c6aa5b272 100644
--- a/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
+++ b/llvm/lib/Transforms/IPO/AttributorAttributes.cpp
@@ -1325,20 +1325,20 @@ struct AAPointerInfoImpl
 
         const auto *FnReachabilityAA = A.getAAFor<AAInterFnReachability>(
             QueryingAA, IRPosition::function(Scope), DepClassTy::OPTIONAL);
-        if (FnReachabilityAA) {
-          // Without going backwards in the call tree, can we reach the access
-          // from the least dominating write. Do not allow to pass the
-          // instruction itself either.
-          bool Inserted = ExclusionSet.insert(&I).second;
-
-          if (!FnReachabilityAA->instructionCanReach(
-                  A, *LeastDominatingWriteInst,
-                  *Acc.getRemoteInst()->getFunction(), &ExclusionSet))
-            WriteChecked = true;
-
-          if (Inserted)
-            ExclusionSet.erase(&I);
-        }
+
+        // Without going backwards in the call tree, can we reach the access
+        // from the least dominating write. Do not allow to pass the instruction
+        // itself either.
+        bool Inserted = ExclusionSet.insert(&I).second;
+
+        if (!FnReachabilityAA ||
+            !FnReachabilityAA->instructionCanReach(
+                A, *LeastDominatingWriteInst,
+                *Acc.getRemoteInst()->getFunction(), &ExclusionSet))
+          WriteChecked = true;
+
+        if (Inserted)
+          ExclusionSet.erase(&I);
       }
 
       if (ReadChecked && WriteChecked)

diff  --git a/llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll b/llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
deleted file mode 100644
index f419d89a7f0a44..00000000000000
--- a/llvm/test/CodeGen/AMDGPU/indirect-call-set-from-other-function.ll
+++ /dev/null
@@ -1,73 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-globals
-; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=amdgpu-attributor %s -o - | FileCheck %s
-
- at g_fn = addrspace(1) global ptr null
-
-;.
-; CHECK: @g_fn = addrspace(1) global ptr null
-;.
-define void @set_fn(ptr %fn) {
-; CHECK-LABEL: define {{[^@]+}}@set_fn
-; CHECK-SAME: (ptr [[FN:%.*]]) #[[ATTR0:[0-9]+]] {
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    store ptr [[FN]], ptr addrspace(1) @g_fn, align 8
-; CHECK-NEXT:    ret void
-;
-entry:
-  store ptr %fn, ptr addrspace(1) @g_fn
-  ret void
-}
-
-define void @get_fn(ptr %fn) {
-; CHECK-LABEL: define {{[^@]+}}@get_fn
-; CHECK-SAME: (ptr [[FN:%.*]]) #[[ATTR0]] {
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[LOAD:%.*]] = load ptr, ptr addrspace(1) @g_fn, align 8
-; CHECK-NEXT:    store ptr [[LOAD]], ptr [[FN]], align 8
-; CHECK-NEXT:    ret void
-;
-entry:
-  %load = load ptr, ptr addrspace(1) @g_fn
-  store ptr %load, ptr %fn
-  ret void
-}
-
-define void @foo() {
-; CHECK-LABEL: define {{[^@]+}}@foo
-; CHECK-SAME: () #[[ATTR1:[0-9]+]] {
-; CHECK-NEXT:  entry:
-; CHECK-NEXT:    [[FN:%.*]] = alloca ptr, align 8, addrspace(5)
-; CHECK-NEXT:    store ptr null, ptr addrspace(5) [[FN]], align 8
-; CHECK-NEXT:    [[FN_CAST:%.*]] = addrspacecast ptr addrspace(5) [[FN]] to ptr
-; CHECK-NEXT:    call void @get_fn(ptr [[FN_CAST]])
-; CHECK-NEXT:    [[LOAD:%.*]] = load ptr, ptr addrspace(5) [[FN]], align 8
-; CHECK-NEXT:    [[TOBOOL:%.*]] = icmp ne ptr [[LOAD]], null
-; CHECK-NEXT:    br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
-; CHECK:       if.then:
-; CHECK-NEXT:    [[LOAD_1:%.*]] = load ptr, ptr addrspace(5) [[FN]], align 8
-; CHECK-NEXT:    call void [[LOAD_1]]()
-; CHECK-NEXT:    br label [[IF_END]]
-; CHECK:       if.end:
-; CHECK-NEXT:    ret void
-;
-entry:
-  %fn = alloca ptr, addrspace(5)
-  store ptr null, ptr addrspace(5) %fn
-  %fn.cast = addrspacecast ptr addrspace(5) %fn to ptr
-  call void @get_fn(ptr %fn.cast)
-  %load = load ptr, ptr addrspace(5) %fn
-  %tobool = icmp ne ptr %load, null
-  br i1 %tobool, label %if.then, label %if.end
-
-if.then:
-  %load.1 = load ptr, ptr addrspace(5) %fn
-  call void %load.1()
-  br label %if.end
-
-if.end:
-  ret void
-}
-;.
-; CHECK: attributes #[[ATTR0]] = { "amdgpu-no-agpr" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
-; CHECK: attributes #[[ATTR1]] = { "amdgpu-waves-per-eu"="4,10" "uniform-work-group-size"="false" }
-;.