[llvm-branch-commits] [llvm] InferAddressSpaces: Handle llvm.is.constant (PR #102010)
Matt Arsenault via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Aug 5 09:54:36 PDT 2024
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/102010
>From 227f60ec2454ade7df9715c84f6d83840872c18d Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Mon, 5 Aug 2024 20:27:07 +0400
Subject: [PATCH] InferAddressSpaces: Handle llvm.is.constant
---
.../Transforms/Scalar/InferAddressSpaces.cpp | 12 +++-
.../InferAddressSpaces/AMDGPU/is.constant.ll | 56 +++++++++++++++++++
2 files changed, 67 insertions(+), 1 deletion(-)
create mode 100644 llvm/test/Transforms/InferAddressSpaces/AMDGPU/is.constant.ll
diff --git a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
index 2ddf24be67702..0bb7517d784a3 100644
--- a/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
+++ b/llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
@@ -401,7 +401,8 @@ bool InferAddressSpacesImpl::rewriteIntrinsicOperands(IntrinsicInst *II,
II->setCalledFunction(NewDecl);
return true;
}
- case Intrinsic::prefetch: {
+ case Intrinsic::prefetch:
+ case Intrinsic::is_constant: {
Function *NewDecl =
Intrinsic::getDeclaration(M, II->getIntrinsicID(), {NewV->getType()});
II->setArgOperand(0, NewV);
@@ -429,6 +430,15 @@ void InferAddressSpacesImpl::collectRewritableIntrinsicOperands(
appendsFlatAddressExpressionToPostorderStack(II->getArgOperand(0),
PostorderStack, Visited);
break;
+ case Intrinsic::is_constant: {
+ Value *Ptr = II->getArgOperand(0);
+ if (Ptr->getType()->isPtrOrPtrVectorTy()) {
+ appendsFlatAddressExpressionToPostorderStack(Ptr, PostorderStack,
+ Visited);
+ }
+
+ break;
+ }
case Intrinsic::masked_load:
case Intrinsic::masked_gather:
case Intrinsic::prefetch:
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/is.constant.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/is.constant.ll
new file mode 100644
index 0000000000000..a761f59b4312f
--- /dev/null
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/is.constant.ll
@@ -0,0 +1,56 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
+; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -passes=infer-address-spaces %s | FileCheck %s
+
+define i1 @is_constant_global_to_flat(ptr addrspace(1) %ptr) {
+; CHECK-LABEL: define i1 @is_constant_global_to_flat(
+; CHECK-SAME: ptr addrspace(1) [[PTR:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = call i1 @llvm.is.constant.p1(ptr addrspace(1) [[PTR]])
+; CHECK-NEXT: ret i1 [[RET]]
+;
+ %cast = addrspacecast ptr addrspace(1) %ptr to ptr
+ %ret = call i1 @llvm.is.constant.p0(ptr %cast)
+ ret i1 %ret
+}
+
+define i1 @is_constant_local_to_flat(ptr addrspace(3) %ptr) {
+; CHECK-LABEL: define i1 @is_constant_local_to_flat(
+; CHECK-SAME: ptr addrspace(3) [[PTR:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = call i1 @llvm.is.constant.p3(ptr addrspace(3) [[PTR]])
+; CHECK-NEXT: ret i1 [[RET]]
+;
+ %cast = addrspacecast ptr addrspace(3) %ptr to ptr
+ %ret = call i1 @llvm.is.constant.p0(ptr %cast)
+ ret i1 %ret
+}
+
+define i1 @is_constant_private_to_flat(ptr addrspace(5) %ptr) {
+; CHECK-LABEL: define i1 @is_constant_private_to_flat(
+; CHECK-SAME: ptr addrspace(5) [[PTR:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = call i1 @llvm.is.constant.p5(ptr addrspace(5) [[PTR]])
+; CHECK-NEXT: ret i1 [[RET]]
+;
+ %cast = addrspacecast ptr addrspace(5) %ptr to ptr
+ %ret = call i1 @llvm.is.constant.p0(ptr %cast)
+ ret i1 %ret
+}
+
+define i1 @is_constant_private_to_flat_v2(<2 x ptr addrspace(5)> %ptr) {
+; CHECK-LABEL: define i1 @is_constant_private_to_flat_v2(
+; CHECK-SAME: <2 x ptr addrspace(5)> [[PTR:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = call i1 @llvm.is.constant.v2p5(<2 x ptr addrspace(5)> [[PTR]])
+; CHECK-NEXT: ret i1 [[RET]]
+;
+ %cast = addrspacecast <2 x ptr addrspace(5)> %ptr to <2 x ptr>
+ %ret = call i1 @llvm.is.constant.v2p0(<2 x ptr> %cast)
+ ret i1 %ret
+}
+
+define i1 @is_constant_i32(i32 %val) {
+; CHECK-LABEL: define i1 @is_constant_i32(
+; CHECK-SAME: i32 [[VAL:%.*]]) {
+; CHECK-NEXT: [[RET:%.*]] = call i1 @llvm.is.constant.i32(i32 [[VAL]])
+; CHECK-NEXT: ret i1 [[RET]]
+;
+ %ret = call i1 @llvm.is.constant.i32(i32 %val)
+ ret i1 %ret
+}
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