[llvm-branch-commits] [llvm] 08d720d - [PowerPC] Update V17.0.0 release notes
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Wed Aug 30 23:56:09 PDT 2023
Author: Lei Huang
Date: 2023-08-30T19:58:36+02:00
New Revision: 08d720da6b1e0734e8ce137e8ead004dec63280b
URL: https://github.com/llvm/llvm-project/commit/08d720da6b1e0734e8ce137e8ead004dec63280b
DIFF: https://github.com/llvm/llvm-project/commit/08d720da6b1e0734e8ce137e8ead004dec63280b.diff
LOG: [PowerPC] Update V17.0.0 release notes
Added:
Modified:
clang/docs/ReleaseNotes.rst
llvm/docs/ReleaseNotes.rst
Removed:
################################################################################
diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst
index 180152417a4901..76cc074dede762 100644
--- a/clang/docs/ReleaseNotes.rst
+++ b/clang/docs/ReleaseNotes.rst
@@ -273,6 +273,10 @@ Non-comprehensive list of changes in this release
types. This allows access to ``llvm.nearbyint`` for arbitrary
floating-point and vector of floating-point types.
- Clang AST matcher now matches concept declarations with `conceptDecl`.
+- Clang now supports more GCC stdio builtins: ``__builtin_vprintf``, ``__builtin_vfprintf``,
+ ``__builtin_fscanf``, ``__builtin_scanf``, ``__builtin_sscanf``, ``__builtin_vfscanf``,
+ ``__builtin_vscanf``, ``__builtin_vsscanf``.
+
New Compiler Flags
------------------
@@ -293,7 +297,11 @@ New Compiler Flags
- ``-print-multi-flags-experimental`` prints the flags used for multilib
selection. See `the multilib docs <https://clang.llvm.org/docs/Multilib.html>`_
for more details.
-
+- ``-maix32`` and ``-maix64`` are new GCC compatibility flags that select the
+ bitmode to target on AIX.
+- ``-p`` is a new GCC compatibility flag for AIX and Linux which works
+ similarly to ``-pg`` by writing profile information, but targets the ``prof``
+ tool as opposed to the ``gprof`` tool.
Deprecated Compiler Flags
-------------------------
@@ -713,6 +721,14 @@ Bug Fixes in This Version
The current solution may bring performance regressions if the awaiters have
non-static data members. See
`#64945 <https://github.com/llvm/llvm-project/issues/64945>`_ for details.
+- Clang now correctly diagnoses ``function_needs_feature`` when always_inline
+ callee has incompatible target features with caller.
+- Removed the linking of libraries when ``-r`` is passed to the driver on AIX.
+- Fixed an Itanium ABI bug where we force exactly two-byte alignment on member
+ functions to reserve a bit in function pointers for identifying pointers to
+ virtual member functions even if the target required a greater function
+ alignment and/or did not have function pointers which point to function entry
+ points (i.e., uses function descriptor objects instead).
Bug Fixes to Compiler Builtins
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
@@ -991,10 +1007,19 @@ CUDA Support
AIX Support
^^^^^^^^^^^
-- Add an AIX-only link-time option, `-mxcoff-build-id=0xHEXSTRING`, to allow users
- to embed a hex id in their binary such that it's readable by the program itself.
- This option is an alternative to the `--build-id=0xHEXSTRING` GNU linker option
- which is currently not supported by the AIX linker.
+- Enabled ThinLTO support. Minimum OS requirement is AIX 7.2 TL5 SP6 or
+ the upcoming AIX 7.3 TL2.
+
+- Enabled integrated assembler (``-f[no-]integrated-as``) for LTO. LTO now
+ defaults to the integrated assembler.
+
+- Enabled Clang-based instrumented profiling
+ (``-fprofile-instr-[generate|use]``).
+
+- Added an AIX-only link-time option, ``-mxcoff-build-id=0xHEXSTRING``, to allow
+ users to embed a hex id in their binary such that it's readable by the program
+ itself. This option is an alternative to the ``--build-id=0xHEXSTRING`` GNU
+ linker option, which is currently not supported by the AIX linker.
- Introduced the ``-mxcoff-roptr`` option to place constant objects with
relocatable address values in the read-only data section. This option should
@@ -1003,6 +1028,14 @@ AIX Support
read-only data sections with relocatable address values that resolve to
imported symbols are made writable.
+- Implemented the ``-frecord-command-line`` option on AIX, which saves the
+ command-line options used from compiling a source file to the corresponding
+ object file or binary file.
+
+- Added a new linker option, ``-K``, that is used to align the header, text,
+ data, and loader sections of the output file so that each section begins on
+ a page boundary.
+
WebAssembly Support
^^^^^^^^^^^^^^^^^^^
- Shared library support (and PIC code generation) for WebAssembly is no longer
@@ -1019,6 +1052,11 @@ AVR Support
of ``USHRT_MAX`` is now ``unsigned int`` instead of ``int``, as required by
the C standard.
+PowerPC Support
+^^^^^^^^^^^^^^^
+- Clang now emits errors when it detects incompatible target features for
+ PowerPC builtins.
+
DWARF Support in Clang
----------------------
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index bd12d8c3964f63..0cb7a6266f1abf 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -230,19 +230,57 @@ Changes to the MIPS Backend
Changes to the PowerPC Backend
------------------------------
+* Improved code sequence of materializing 64-bit immediate numbers, expanding
+ ``is.fpclass`` intrinsic and forwarding stores.
+* Implemented DFP instructions (for use via inline asm).
+* Improved code gen for vector add.
+* Added ability to show statistics of number of entries in the TOC.
+* Added Binary Coded Decimal Assist instructions (for use via inline asm).
+* Added basic support for vector functions in GlobalISel.
+* Added additional X-Form load and store instruction generation for TLS accesses.
+* PPC64LE backend is added to JITLink.
+* Added various bug fixes and optimizations.
+* Added function pointer alignment to the DataLayout for Power, which lets us
+ make more informed choices about what this alignment defaults to for various
+ purposes (e.g., C++ pointers to member). If the target ABI uses function
+ descriptor objects, this is the alignment we would emit the descriptor with.
+ Otherwise, a function pointer points to a global entry point, so this is at
+ least the alignment for code on Power (i.e., 4-bytes).
+
+AIX Support/improvements:
+
+
* A new option ``-mxcoff-roptr`` is added to ``clang`` and ``llc``. When this
option is present, constant objects with relocatable address values are put
- into the RO data section. This option should be used with the ``-fdata-sections``
- option, and is not supported with ``-fno-data-sections``. The option is
- only supported on AIX.
-* On AIX, teach the profile runtime to check for a build-id string; such string
- can be created by the -mxcoff-build-id option.
+ into the RO data section. This option should be used with the
+ ``-fdata-sections`` option, and is not supported with ``-fno-data-sections``.
+
+* Taught the profile runtime to check for a build-id string. Build-id strings
+ can be created via the ``-mxcoff-build-id`` option.
+
* Removed ``-ppc-quadword-atomics`` which only affected lock-free quadword
atomics on AIX. Now backend generates lock-free quadword atomics code on AIX
by default. To support lock-free quadword atomics in libatomic, the OS level
must be at least AIX 7.2 TL5 SP3 with libc++.rte of version 17.1.1 or above
installed.
+* Integrated assembler is enabled by default on AIX.
+* System assembler is always used to compile assembly files on AIX.
+* Added support for local-exec TLS.
+* Added a new option, ``--traceback-table``, to ``llvm-objdump`` to print out
+ the traceback table information for XCOFF object files.
+* Added ``llvm-ar`` object mode options ``-X32``, ``-X64``, ``-X32-64``,
+ and ``-Xany``.
+* Changed the default name of the text-section csect to be an empty string
+ instead of ``.text``. This change does not affect the behaviour
+ of the program.
+* Fixed a problem when the personality routine for the legacy AIX ``xlclang++``
+ compiler uses the stack slot to pass the exception object to the landing pad.
+ Runtime routine ``__xlc_exception_handle()`` invoked by the landing pad to
+ retrieve the exception object now skips frames not associated with functions
+ that are C++ EH-aware because the compiler sometimes generates a wrapper of
+ ``__xlc_exception_handle()`` for optimization purposes.
+
Changes to the RISC-V Backend
-----------------------------
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