[llvm-branch-commits] [llvm] 60a88d4 - [InstCombine] Fix select + cast fold with constant expression (PR64669)

[Tobias Hieta via llvm-branch-commits]

Author: Nikita Popov
Date: 2023-08-22T09:02:28+02:00
New Revision: 60a88d4bab72b7c7c5634d58e0b6c08c398991de

URL: https://github.com/llvm/llvm-project/commit/60a88d4bab72b7c7c5634d58e0b6c08c398991de
DIFF: https://github.com/llvm/llvm-project/commit/60a88d4bab72b7c7c5634d58e0b6c08c398991de.diff

LOG: [InstCombine] Fix select + cast fold with constant expression (PR64669)

The zext constant expression was detected by the fold, but then
handled as a sext. Use ZExtOperator instead of ZExtInst to handle
constant expressions.

Fixes https://github.com/llvm/llvm-project/issues/64669.

(cherry picked from commit c15ccfb24afa67d3c3f54e52cc1d1afa564715ed)

Added: 
    

Modified: 
    llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
    llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll

Removed: 
    


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diff  --git a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
index afd6e034f46d70..767b7c7defbb6e 100644
--- a/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
@@ -906,7 +906,7 @@ InstCombinerImpl::foldBinOpOfSelectAndCastOfSelectCondition(BinaryOperator &I) {
 
   auto NewFoldedConst = [&](bool IsTrueArm, Value *V) {
     bool IsCastOpRHS = (CastOp == RHS);
-    bool IsZExt = isa<ZExtInst>(CastOp);
+    bool IsZExt = isa<ZExtOperator>(CastOp);
     Constant *C;
 
     if (IsTrueArm) {

diff  --git a/llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll b/llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll
index 0c859e5c09208b..f96221084ddfaf 100644
--- a/llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll
+++ b/llvm/test/Transforms/InstCombine/binop-select-cast-of-select-cond.ll
@@ -224,3 +224,19 @@ define <2 x i8> @vectorized_add(<2 x i1> %c, <2 x i8> %arg) {
   %add = add <2 x i8> %sel, %zext
   ret <2 x i8> %add
 }
+
+ at b = external global [72 x i32]
+ at c = external global i32
+
+define i64 @pr64669(i64 %a) {
+; CHECK-LABEL: define i64 @pr64669
+; CHECK-SAME: (i64 [[A:%.*]]) {
+; CHECK-NEXT:    [[TMP1:%.*]] = add i64 [[A]], 1
+; CHECK-NEXT:    [[ADD:%.*]] = select i1 icmp ne (ptr getelementptr inbounds ([72 x i32], ptr @b, i64 0, i64 25), ptr @c), i64 [[TMP1]], i64 0
+; CHECK-NEXT:    ret i64 [[ADD]]
+;
+  %mul = select i1 icmp ne (ptr getelementptr inbounds ([72 x i32], ptr @b, i64 0, i64 25), ptr @c), i64 %a, i64 0
+  %conv3 = zext i1 icmp ne (ptr getelementptr inbounds ([72 x i32], ptr @b, i64 0, i64 25), ptr @c) to i64
+  %add = add nsw i64 %mul, %conv3
+  ret i64 %add
+}