[llvm-branch-commits] [llvm] e1e4603 - [X86] Add test case for Issue #64655
Tobias Hieta via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Aug 21 22:51:42 PDT 2023
Author: Simon Pilgrim
Date: 2023-08-22T07:49:44+02:00
New Revision: e1e460373aa8e59f25538818317b37b77f85a66f
URL: https://github.com/llvm/llvm-project/commit/e1e460373aa8e59f25538818317b37b77f85a66f
DIFF: https://github.com/llvm/llvm-project/commit/e1e460373aa8e59f25538818317b37b77f85a66f.diff
LOG: [X86] Add test case for Issue #64655
(cherry picked from commit 2c090e9e67d306578dbeb966a34d9fb85b9f4121)
Added:
llvm/test/CodeGen/X86/pr64655.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/pr64655.ll b/llvm/test/CodeGen/X86/pr64655.ll
new file mode 100644
index 00000000000000..cd5775a61c23e0
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr64655.ll
@@ -0,0 +1,50 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=AVX2
+; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=AVX512
+
+define void @f(ptr %0) {
+; AVX2-LABEL: f:
+; AVX2: # %bb.0:
+; AVX2-NEXT: movzbl (%rdi), %eax
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: shrb $2, %cl
+; AVX2-NEXT: andb $1, %cl
+; AVX2-NEXT: movl %eax, %edx
+; AVX2-NEXT: andb $1, %dl
+; AVX2-NEXT: vmovd %edx, %xmm0
+; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: shrb $3, %cl
+; AVX2-NEXT: andb $1, %cl
+; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: shrb $4, %cl
+; AVX2-NEXT: andb $1, %cl
+; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: shrb $5, %cl
+; AVX2-NEXT: andb $1, %cl
+; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0
+; AVX2-NEXT: movl %eax, %ecx
+; AVX2-NEXT: shrb $6, %cl
+; AVX2-NEXT: andb $1, %cl
+; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0
+; AVX2-NEXT: shrb $7, %al
+; AVX2-NEXT: vpinsrb $14, %eax, %xmm0, %xmm0
+; AVX2-NEXT: movl $1, %eax
+; AVX2-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0
+; AVX2-NEXT: vpsllw $15, %xmm0, %xmm0
+; AVX2-NEXT: vpacksswb %xmm0, %xmm0, %xmm0
+; AVX2-NEXT: vpmovmskb %xmm0, %eax
+; AVX2-NEXT: movb %al, (%rdi)
+; AVX2-NEXT: retq
+;
+; AVX512-LABEL: f:
+; AVX512: # %bb.0:
+; AVX512-NEXT: movb $1, 1(%rdi)
+; AVX512-NEXT: retq
+ %2 = load <8 x i1>, ptr %0
+ %3 = insertelement <8 x i1> %2, i1 true, i32 1
+ store <8 x i1> %3, ptr %0
+ ret void
+}
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