[llvm-branch-commits] [clang] 1c76740 - [AArch64] Basic target(+crypto) handling

[Tobias Hieta via llvm-branch-commits]

Author: David Green
Date: 2023-04-17T16:25:51+02:00
New Revision: 1c76740cb3b9b89ed83a556325018c88a293dc63

URL: https://github.com/llvm/llvm-project/commit/1c76740cb3b9b89ed83a556325018c88a293dc63
DIFF: https://github.com/llvm/llvm-project/commit/1c76740cb3b9b89ed83a556325018c88a293dc63.diff

LOG: [AArch64] Basic target(+crypto) handling

This adds some basic handling for target(+crypto) attributes. In this patch it
just enabled aes and sha2 regardless of the architecture revision, which
matches gccs implementation (and keeps the patch simple).

Differential Revision: https://reviews.llvm.org/D142135

(cherry picked from commit 43aa293aeaf04e8da50c3c531694444c0311e0c5)

Added: 
    clang/test/CodeGen/aarch64-targetattr-crypto.c

Modified: 
    llvm/include/llvm/TargetParser/AArch64TargetParser.h

Removed: 
    


################################################################################
diff  --git a/clang/test/CodeGen/aarch64-targetattr-crypto.c b/clang/test/CodeGen/aarch64-targetattr-crypto.c
new file mode 100644
index 0000000000000..d3609240fbd55
--- /dev/null
+++ b/clang/test/CodeGen/aarch64-targetattr-crypto.c
@@ -0,0 +1,53 @@
+// RUN: %clang_cc1 -triple aarch64-eabi -target-feature +v8a -verify -S %s -o -
+// REQUIRES: aarch64-registered-target
+
+#include <arm_neon.h>
+
+__attribute__((target("+crypto")))
+void test_crypto(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key);
+  vsha1su1q_u32(data, key);
+}
+
+__attribute__((target("crypto")))
+void test_pluscrypto(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key);
+  vsha1su1q_u32(data, key);
+}
+
+__attribute__((target("arch=armv8.2-a+crypto")))
+void test_archcrypto(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key);
+  vsha1su1q_u32(data, key);
+}
+
+// FIXME: This shouldn't need +crypto to be consistent with -mcpu options.
+__attribute__((target("cpu=cortex-a55+crypto")))
+void test_a55crypto(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key);
+  vsha1su1q_u32(data, key);
+}
+
+__attribute__((target("cpu=cortex-a510+crypto")))
+void test_a510crypto(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key);
+  vsha1su1q_u32(data, key);
+}
+
+__attribute__((target("+sha2+aes")))
+void test_sha2aes(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key);
+  vsha1su1q_u32(data, key);
+}
+
+void test_errors(uint8x16_t data, uint8x16_t key)
+{
+  vaeseq_u8(data, key); // expected-error {{always_inline function 'vaeseq_u8' requires target feature 'aes'}}
+  vsha1su1q_u32(data, key); // expected-error {{always_inline function 'vsha1su1q_u32' requires target feature 'sha2'}}
+}

diff  --git a/llvm/include/llvm/TargetParser/AArch64TargetParser.h b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
index 11fce886ffb83..1326968e34dec 100644
--- a/llvm/include/llvm/TargetParser/AArch64TargetParser.h
+++ b/llvm/include/llvm/TargetParser/AArch64TargetParser.h
@@ -177,7 +177,7 @@ inline constexpr ExtensionInfo Extensions[] = {
     {"brbe", AArch64::AEK_BRBE, "+brbe", "-brbe", FEAT_MAX, "", 0},
     {"bti", AArch64::AEK_NONE, {}, {}, FEAT_BTI, "+bti", 510},
     {"crc", AArch64::AEK_CRC, "+crc", "-crc", FEAT_CRC, "+crc", 110},
-    {"crypto", AArch64::AEK_CRYPTO, "+crypto", "-crypto", FEAT_MAX, "", 0},
+    {"crypto", AArch64::AEK_CRYPTO, "+crypto", "-crypto", FEAT_MAX, "+aes,+sha2", 0},
     {"cssc", AArch64::AEK_CSSC, "+cssc", "-cssc", FEAT_MAX, "", 0},
     {"d128", AArch64::AEK_D128, "+d128", "-d128", FEAT_MAX, "", 0},
     {"dgh", AArch64::AEK_NONE, {}, {}, FEAT_DGH, "", 260},