[llvm-branch-commits] [clang] 04b3c29 - [SiFive][Clang] Added index checks for VCIX intrinsics.
via llvm-branch-commits
llvm-branch-commits at lists.llvm.org
Mon Nov 14 23:54:12 PST 2022
Author: Nelson Chu
Date: 2022-11-14T23:52:36-08:00
New Revision: 04b3c29bd2a62e57aa2e4a5054e7b810360f3c33
URL: https://github.com/llvm/llvm-project/commit/04b3c29bd2a62e57aa2e4a5054e7b810360f3c33
DIFF: https://github.com/llvm/llvm-project/commit/04b3c29bd2a62e57aa2e4a5054e7b810360f3c33.diff
LOG: [SiFive][Clang] Added index checks for VCIX intrinsics.
[SCT-1484] [VCIX] ICE when VCIX intrinsic give non immediate value to immediate fields.
https://sifive.atlassian.net/browse/SCT-1484
[RVV intrinsics spec]
https://github.com/sifive/rvv-intrinsic-internal/blob/master/rvv_intrinsic_gen/overloaded_intrinsic_funcs/11_sifive_custom_vector_extension_functions.md
Added:
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-index-out-of-range.c
Modified:
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x-rv64.c
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x.c
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv-rv64.c
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv.c
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv-rv64.c
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv.c
clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvw.c
Removed:
################################################################################
diff --git a/clang/lib/Sema/SemaChecking.cpp b/clang/lib/Sema/SemaChecking.cpp
index f46a4d3efc64..82924f314ed3 100644
--- a/clang/lib/Sema/SemaChecking.cpp
+++ b/clang/lib/Sema/SemaChecking.cpp
@@ -4467,6 +4467,129 @@ bool Sema::CheckRISCVBuiltinFunctionCall(const TargetInfo &TI,
(VecInfo.EC.getKnownMinValue() * VecInfo.NumVectors);
return SemaBuiltinConstantArgRange(TheCall, 1, 0, MaxIndex - 1);
}
+#if SIFIVE_CUSTOMIZATION
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8mf8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8mf4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8mf2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u8m8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u16mf4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u16mf2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u16m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u16m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u16m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u16m8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u32mf2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u32m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u32m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u32m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u32m8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u64m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u64m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u64m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_i_se_u64m8:
+ // bit_27_26, bit_24_20, bit_11_7, simm5
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 31) ||
+ SemaBuiltinConstantArgRange(TheCall, 2, 0, 31) ||
+ SemaBuiltinConstantArgRange(TheCall, 3, -16, 15);
+ case RISCVVector::BI__builtin_rvv_sf_vc_iv_se:
+ // bit_27_26, bit_11_7, vs2, simm5
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 31) ||
+ SemaBuiltinConstantArgRange(TheCall, 3, -16, 15);
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_i:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_i_se:
+ // bit_27_26, bit_24_20, simm5
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 31) ||
+ SemaBuiltinConstantArgRange(TheCall, 2, -16, 15);
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_iv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_iv_se:
+ // bit_27_26, vs2, simm5
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 2, -16, 15);
+ case RISCVVector::BI__builtin_rvv_sf_vc_ivv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_ivw_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_ivv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_ivw:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_ivv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_ivw_se:
+ // bit_27_26, vd, vs2, simm5
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 3, -16, 15);
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8mf8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8mf4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8mf2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u8m8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u16mf4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u16mf2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u16m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u16m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u16m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u16m8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u32mf2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u32m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u32m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u32m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u32m8:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u64m1:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u64m2:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u64m4:
+ case RISCVVector::BI__builtin_rvv_sf_vc_x_se_u64m8:
+ // bit_27_26, bit_24_20, bit_11_7, xs1
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 31) ||
+ SemaBuiltinConstantArgRange(TheCall, 2, 0, 31);
+ case RISCVVector::BI__builtin_rvv_sf_vc_xv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_vv_se:
+ // bit_27_26, bit_11_7, vs2, xs1/vs1
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_x:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_x_se:
+ // bit_27_26, bit_24-20, xs1
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
+ case RISCVVector::BI__builtin_rvv_sf_vc_vvv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_xvv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_vvw_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_xvw_se:
+ // bit_27_26, vd, vs2, xs1
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_xv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_vv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_xv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_vv_se:
+ // bit_27_26, vs2, xs1/vs1
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_xvv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_vvv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_xvw:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_vvw:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_xvv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_vvv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_xvw_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_vvw_se:
+ // bit_27_26, vd, vs2, xs1/vs1
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 3);
+ case RISCVVector::BI__builtin_rvv_sf_vc_fv_se:
+ // bit_26, bit_11_7, vs2, fs1
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 1) ||
+ SemaBuiltinConstantArgRange(TheCall, 1, 0, 31);
+ case RISCVVector::BI__builtin_rvv_sf_vc_fvv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_fvw_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_fvv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_fvw:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_fvv_se:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_fvw_se:
+ // bit_26, vd, vs2, fs1
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_fv:
+ case RISCVVector::BI__builtin_rvv_sf_vc_v_fv_se:
+ // bit_26, vs2, fs1
+ return SemaBuiltinConstantArgRange(TheCall, 0, 0, 1);
+#endif // SIFIVE_CUSTOMIZATION
// Check if byteselect is in [0, 3]
case RISCV::BI__builtin_riscv_aes32dsi_32:
case RISCV::BI__builtin_riscv_aes32dsmi_32:
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-index-out-of-range.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-index-out-of-range.c
new file mode 100644
index 000000000000..d84c46d55e3a
--- /dev/null
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-index-out-of-range.c
@@ -0,0 +1,763 @@
+// REQUIRES: riscv-registered-target
+// RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
+// RUN: -target-feature +v -target-feature +zfh -target-feature +experimental-zvfh \
+// RUN: -target-feature +xsfvcp \
+// RUN: -fsyntax-only -verify %s
+
+#include <riscv_vector.h>
+
+#define p27_26 (0b11)
+#define p26 (0b1)
+#define p24_20 (0b11111)
+#define p11_7 (0b11111)
+#define simm5 (15)
+
+#define p27_26_overflow (0b100)
+#define p26_overflow (0b10)
+#define p24_20_overflow (0b100000)
+#define p11_7_overflow (0b100001)
+#define simm5_overflow (16)
+
+// sf_vc_x_se
+
+void test_sf_vc_x_se_u8mf8_p27_26_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_x_se_u8mf8' must be a constant integer}}
+ sf_vc_x_se_u8mf8(index, p24_20, p11_7, rs1, vl);
+}
+
+void test_sf_vc_x_se_u8mf8_24_20_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_x_se_u8mf8' must be a constant integer}}
+ sf_vc_x_se_u8mf8(p27_26, index, p11_7, rs1, vl);
+}
+
+void test_sf_vc_x_se_u8mf8_11_7_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_x_se_u8mf8' must be a constant integer}}
+ sf_vc_x_se_u8mf8(p27_26, p24_20, index, rs1, vl);
+}
+
+void test_sf_vc_x_se_u8mf8_p27_26_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_x_se_u8mf8(p27_26_overflow, p24_20, p11_7, rs1, vl);
+}
+
+void test_sf_vc_x_se_u8mf8_p24_20_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 32 is outside the valid range [0, 31]}}
+ sf_vc_x_se_u8mf8(p27_26, p24_20_overflow, p11_7, rs1, vl);
+}
+
+void test_sf_vc_x_se_u8mf8_p11_7_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 33 is outside the valid range [0, 31]}}
+ sf_vc_x_se_u8mf8(p27_26, p24_20, p11_7_overflow, rs1, vl);
+}
+
+// sf_vc_i_se
+
+void test_sf_vc_i_se_u8mf8_p27_26_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_i_se_u8mf8' must be a constant integer}}
+ sf_vc_i_se_u8mf8(index, p24_20, p11_7, simm5, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_24_20_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_i_se_u8mf8' must be a constant integer}}
+ sf_vc_i_se_u8mf8(p27_26, index, p11_7, simm5, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_11_7_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_i_se_u8mf8' must be a constant integer}}
+ sf_vc_i_se_u8mf8(p27_26, p24_20, index, simm5, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_simm5_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_i_se_u8mf8' must be a constant integer}}
+ sf_vc_i_se_u8mf8(p27_26, p24_20, p11_7, index, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_p27_26_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_i_se_u8mf8(p27_26_overflow, p24_20, p11_7, simm5, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_p24_20_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 32 is outside the valid range [0, 31]}}
+ sf_vc_i_se_u8mf8(p27_26, p24_20_overflow, p11_7, simm5, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_p11_7_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 33 is outside the valid range [0, 31]}}
+ sf_vc_i_se_u8mf8(p27_26, p24_20, p11_7_overflow, simm5, vl);
+}
+
+void test_sf_vc_i_se_u8mf8_simm5_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ sf_vc_i_se_u8mf8(p27_26, p24_20, p11_7, simm5_overflow, vl);
+}
+
+// sf_vc_v_x_se
+
+vuint8mf8_t test_sf_vc_v_x_se_u8mf8_p27_26_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_x_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_x_se_u8mf8(index, p24_20, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_x_se_u8mf8_p24_20_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_x_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_x_se_u8mf8(p27_26, index, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_x_se_u8mf8_p27_26_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_x_se_u8mf8(p27_26_overflow, p24_20, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_x_se_u8mf8_p24_20_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 32 is outside the valid range [0, 31]}}
+ return sf_vc_v_x_se_u8mf8(p27_26, p24_20_overflow, rs1, vl);
+}
+
+// sf_vc_v_x
+
+vuint8mf8_t test_sf_vc_v_x_u8mf8_p27_26_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_x_u8mf8' must be a constant integer}}
+ return sf_vc_v_x_u8mf8(index, p24_20, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_x_u8mf8_p24_20_not_constant(uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_x_u8mf8' must be a constant integer}}
+ return sf_vc_v_x_u8mf8(p27_26, index, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_x_u8mf8_p27_26_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_x_u8mf8(p27_26_overflow, p24_20, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_x_u8mf8_p24_20_overflow(uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 32 is outside the valid range [0, 31]}}
+ return sf_vc_v_x_u8mf8(p27_26, p24_20_overflow, rs1, vl);
+}
+
+// sf_vc_v_i_se
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8_p27_26_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_i_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_i_se_u8mf8(index, p24_20, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8_p24_20_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_i_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_i_se_u8mf8(p27_26, index, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8_simm5_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_i_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_i_se_u8mf8(p27_26, p24_20, index, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8_p27_26_overflow(size_t vl, int index) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_i_se_u8mf8(p27_26_overflow, p24_20, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8_p24_20_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 32 is outside the valid range [0, 31]}}
+ return sf_vc_v_i_se_u8mf8(p27_26, p24_20_overflow, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_se_u8mf8_simm5_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_i_se_u8mf8(p27_26, p24_20, simm5_overflow, vl);
+}
+
+// sf_vc_v_i
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8_p27_26_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_i_u8mf8' must be a constant integer}}
+ return sf_vc_v_i_u8mf8(index, p24_20, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8_p24_20_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_i_u8mf8' must be a constant integer}}
+ return sf_vc_v_i_u8mf8(p27_26, index, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8_simm5_not_constant(size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_i_u8mf8' must be a constant integer}}
+ return sf_vc_v_i_u8mf8(p27_26, p24_20, index, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8_p27_26_overflow(size_t vl, int index) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_i_u8mf8(p27_26_overflow, p24_20, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8_p24_20_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 32 is outside the valid range [0, 31]}}
+ return sf_vc_v_i_u8mf8(p27_26, p24_20_overflow, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_i_u8mf8_simm5_overflow(size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_i_u8mf8(p27_26, p24_20, simm5_overflow, vl);
+}
+
+// sf_vc_vv_se
+
+void test_sf_vc_vv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_vv_se_u8mf8' must be a constant integer}}
+ sf_vc_vv_se_u8mf8(index, p11_7, vs2, vs1, vl);
+}
+
+void test_sf_vc_vv_se_u8mf8_p11_7_not_constant(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_vv_se_u8mf8' must be a constant integer}}
+ sf_vc_vv_se_u8mf8(p27_26, index, vs2, vs1, vl);
+}
+
+void test_sf_vc_vv_se_u8mf8_p27_26_overflow(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_vv_se_u8mf8(p27_26_overflow, p11_7, vs2, vs1, vl);
+}
+
+void test_sf_vc_vv_se_u8mf8_p11_7_overflow(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 33 is outside the valid range [0, 31]}}
+ sf_vc_vv_se_u8mf8(p27_26, p11_7_overflow, vs2, vs1, vl);
+}
+
+// sf_vc_xv_se
+
+void test_sf_vc_xv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_xv_se_u8mf8' must be a constant integer}}
+ sf_vc_xv_se_u8mf8(index, p11_7, vs2, rs1, vl);
+}
+
+void test_sf_vc_xv_se_u8mf8_p11_7_not_constant(vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_xv_se_u8mf8' must be a constant integer}}
+ sf_vc_xv_se_u8mf8(p27_26, index, vs2, rs1, vl);
+}
+
+void test_sf_vc_xv_se_u8mf8_p27_26_overflow(vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_xv_se_u8mf8(p27_26_overflow, p11_7, vs2, rs1, vl);
+}
+
+void test_sf_vc_xv_se_u8mf8_p11_7_overflow(vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 33 is outside the valid range [0, 31]}}
+ sf_vc_xv_se_u8mf8(p27_26, p11_7_overflow, vs2, rs1, vl);
+}
+
+// sf_vc_iv_se
+
+void test_sf_vc_iv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_iv_se_u8mf8' must be a constant integer}}
+ sf_vc_iv_se_u8mf8(index, p11_7, vs2, simm5, vl);
+}
+
+void test_sf_vc_iv_se_u8mf8_p11_7_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_iv_se_u8mf8' must be a constant integer}}
+ sf_vc_iv_se_u8mf8(p27_26, index, vs2, simm5, vl);
+}
+
+void test_sf_vc_iv_se_u8mf8_simm5_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_iv_se_u8mf8' must be a constant integer}}
+ sf_vc_iv_se_u8mf8(p27_26, p11_7, vs2, index, vl);
+}
+
+void test_sf_vc_iv_se_u8mf8_p27_26_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_iv_se_u8mf8(p27_26_overflow, p11_7, vs2, simm5, vl);
+}
+
+void test_sf_vc_iv_se_u8mf8_p11_7_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 33 is outside the valid range [0, 31]}}
+ sf_vc_iv_se_u8mf8(p27_26, p11_7_overflow, vs2, simm5, vl);
+}
+
+void test_sf_vc_iv_se_u8mf8_simm5_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ sf_vc_iv_se_u8mf8(p27_26, p11_7, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_fv_se
+
+void test_sf_vc_fv_se_u16mf4_p26_not_constant(vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_fv_se_u16mf4' must be a constant integer}}
+ sf_vc_fv_se_u16mf4(index, p11_7, vs2, fs1, vl);
+}
+
+void test_sf_vc_fv_se_u16mf4_p11_7_not_constant(vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_fv_se_u16mf4' must be a constant integer}}
+ sf_vc_fv_se_u16mf4(p26, index, vs2, fs1, vl);
+}
+
+void test_sf_vc_fv_se_u16mf4_p26_overflow(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ sf_vc_fv_se_u16mf4(p26_overflow, p11_7, vs2, fs1, vl);
+}
+
+void test_sf_vc_fv_se_u16mf4_p11_7_overflow(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 33 is outside the valid range [0, 31]}}
+ sf_vc_fv_se_u16mf4(p26, p11_7_overflow, vs2, fs1, vl);
+}
+
+// sf_vc_v_vv_se
+
+vuint8mf8_t test_sf_vc_v_vv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_vv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_vv_se_u8mf8(index, vs2, vs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_vv_se_u8mf8_p27_26_overflow(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_vv_se_u8mf8(p27_26_overflow, vs2, vs1, vl);
+}
+
+// sf_vc_v_vv
+
+vuint8mf8_t test_sf_vc_v_vv_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_vv_u8mf8' must be a constant integer}}
+ return sf_vc_v_vv_u8mf8(index, vs2, vs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_vv_u8mf8_p27_26_overflow(vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_vv_u8mf8(p27_26_overflow, vs2, vs1, vl);
+}
+
+// sf_vc_v_xv_se
+
+vuint8mf8_t test_sf_vc_v_xv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_xv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_xv_se_u8mf8(index, vs2, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_xv_se_u8mf8_p27_26_overflow(vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_xv_se_u8mf8(p27_26_overflow, vs2, rs1, vl);
+}
+
+// sf_vc_v_xv
+
+vuint8mf8_t test_sf_vc_v_xv_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_xv_u8mf8' must be a constant integer}}
+ return sf_vc_v_xv_u8mf8(index, vs2, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_xv_u8mf8_p27_26_overflow(vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_xv_u8mf8(p27_26_overflow, vs2, rs1, vl);
+}
+
+// sf_vc_v_iv_se
+
+vuint8mf8_t test_sf_vc_v_iv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_iv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_iv_se_u8mf8(index, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_iv_se_u8mf8_simm5_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_iv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_iv_se_u8mf8(p27_26, vs2, index, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_iv_se_u8mf8_p27_26_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_iv_se_u8mf8(p27_26_overflow, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_iv_se_u8mf8_simm5_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_iv_se_u8mf8(p27_26, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_v_iv
+
+vuint8mf8_t test_sf_vc_v_iv_u8mf8_p27_26_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_iv_u8mf8' must be a constant integer}}
+ return sf_vc_v_iv_u8mf8(index, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_iv_u8mf8_simm5_not_constant(vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_iv_u8mf8' must be a constant integer}}
+ return sf_vc_v_iv_u8mf8(p27_26, vs2, index, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_iv_u8mf8_p27_26_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_iv_u8mf8(p27_26_overflow, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_iv_u8mf8_simm5_overflow(vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_iv_u8mf8(p27_26, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_v_fv_se
+
+vuint16mf4_t test_sf_vc_v_fv_se_u16mf4_p26_not_constant(vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ //expected-error at +1 {{argument to 'sf_vc_v_fv_se_u16mf4' must be a constant integer}}
+ return sf_vc_v_fv_se_u16mf4(index, vs2, fs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_fv_se_u16mf4_p26_overflow(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ return sf_vc_v_fv_se_u16mf4(p26_overflow, vs2, fs1, vl);
+}
+
+// sf_vc_v_fv
+
+vuint16mf4_t test_sf_vc_v_fv_u16mf4_p26_not_constant(vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_fv_se_u16mf4' must be a constant integer}}
+ return sf_vc_v_fv_se_u16mf4(index, vs2, fs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_fv_u16mf4_p26_overflow(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ return sf_vc_v_fv_u16mf4(p26_overflow, vs2, fs1, vl);
+}
+
+// sf_vc_vvv_se
+
+void test_sf_vc_vvv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_vvv_se_u8mf8' must be a constant integer}}
+ sf_vc_vvv_se_u8mf8(index, vd, vs2, vs1, vl);
+}
+
+void test_sf_vc_vvv_se_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_vvv_se_u8mf8(p27_26_overflow, vd, vs2, vs1, vl);
+}
+
+// sf_vc_xvv_se
+
+void test_sf_vc_xvv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_xvv_se_u8mf8' must be a constant integer}}
+ sf_vc_xvv_se_u8mf8(index, vd, vs2, rs1, vl);
+}
+
+void test_sf_vc_xvv_se_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_xvv_se_u8mf8(p27_26_overflow, vd, vs2, rs1, vl);
+}
+
+// sf_vc_ivv_se
+
+void test_sf_vc_ivv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_ivv_se_u8mf8' must be a constant integer}}
+ sf_vc_ivv_se_u8mf8(index, vd, vs2, simm5, vl);
+}
+
+void test_sf_vc_ivv_se_u8mf8_simm5_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_ivv_se_u8mf8' must be a constant integer}}
+ sf_vc_ivv_se_u8mf8(p27_26, vd, vs2, index, vl);
+}
+
+void test_sf_vc_ivv_se_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_ivv_se_u8mf8(p27_26_overflow, vd, vs2, simm5, vl);
+}
+
+void test_sf_vc_ivv_se_u8mf8_simm5_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ sf_vc_ivv_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_fvv_se
+
+void test_sf_vc_fvv_se_u16mf4_p26_not_constant(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_fvv_se_u16mf4' must be a constant integer}}
+ sf_vc_fvv_se_u16mf4(index, vd, vs2, fs1, vl);
+}
+
+void test_sf_vc_fvv_se_u16mf4_p26_overflow(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ sf_vc_fvv_se_u16mf4(p26_overflow, vd, vs2, fs1, vl);
+}
+
+// sf_vc_v_vvv_se
+
+vuint8mf8_t test_sf_vc_v_vvv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_vvv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_vvv_se_u8mf8(index, vd, vs2, vs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_vvv_se_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_vvv_se_u8mf8(p27_26_overflow, vd, vs2, vs1, vl);
+}
+
+// sf_vc_v_vvv
+
+vuint8mf8_t test_sf_vc_v_vvv_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_vvv_u8mf8' must be a constant integer}}
+ return sf_vc_v_vvv_u8mf8(index, vd, vs2, vs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_vvv_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_vvv_u8mf8(p27_26_overflow, vd, vs2, vs1, vl);
+}
+
+// sf_vc_v_xvv_se
+
+vuint8mf8_t test_sf_vc_v_xvv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_xvv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_xvv_se_u8mf8(index, vd, vs2, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_xvv_se_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_xvv_se_u8mf8(p27_26_overflow, vd, vs2, rs1, vl);
+}
+
+// sf_vc_v_xvv
+
+vuint8mf8_t test_sf_vc_v_xvv_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_xvv_u8mf8' must be a constant integer}}
+ return sf_vc_v_xvv_u8mf8(index, vd, vs2, rs1, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_xvv_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_xvv_u8mf8(p27_26_overflow, vd, vs2, rs1, vl);
+}
+
+// sf_vc_v_ivv_se
+
+vuint8mf8_t test_sf_vc_v_ivv_se_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivv_se_u8mf8(index, vd, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_ivv_se_u8mf8_simm5_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivv_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivv_se_u8mf8(p27_26, vd, vs2, index, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_ivv_se_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_ivv_se_u8mf8(p27_26_overflow, vd, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_ivv_se_u8mf8_simm5_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_ivv_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_v_ivv
+
+vuint8mf8_t test_sf_vc_v_ivv_u8mf8_p27_26_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivv_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivv_u8mf8(index, vd, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_ivv_u8mf8_simm5_not_constant(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivv_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivv_u8mf8(p27_26, vd, vs2, index, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_ivv_u8mf8_p27_26_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_ivv_u8mf8(p27_26_overflow, vd, vs2, simm5, vl);
+}
+
+vuint8mf8_t test_sf_vc_v_ivv_u8mf8_simm5_overflow(vuint8mf8_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_ivv_u8mf8(p27_26, vd, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_v_fvv_se
+
+vuint16mf4_t test_sf_vc_v_fvv_se_u16mf4_p26_not_constant(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_fvv_se_u16mf4' must be a constant integer}}
+ return sf_vc_v_fvv_se_u16mf4(index, vd, vs2, fs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_fvv_se_u16mf4_p26_overflow(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ return sf_vc_v_fvv_se_u16mf4(p26_overflow, vd, vs2, fs1, vl);
+}
+
+// sf_vc_v_fvv
+
+vuint16mf4_t test_sf_vc_v_fvv_u16mf4_p26_not_constant(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_fvv_u16mf4' must be a constant integer}}
+ return sf_vc_v_fvv_u16mf4(index, vd, vs2, fs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_fvv_u16mf4_p26_overflow(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ return sf_vc_v_fvv_u16mf4(p26_overflow, vd, vs2, fs1, vl);
+}
+
+// sf_vc_vvw_se
+
+void test_sf_vc_vvw_se_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_vvw_se_u8mf8' must be a constant integer}}
+ sf_vc_vvw_se_u8mf8(index, vd, vs2, vs1, vl);
+}
+
+void test_sf_vc_vvw_se_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_vvw_se_u8mf8(p27_26_overflow, vd, vs2, vs1, vl);
+}
+
+// sf_vc_xvw_se
+
+void test_sf_vc_xvw_se_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_xvw_se_u8mf8' must be a constant integer}}
+ sf_vc_xvw_se_u8mf8(index, vd, vs2, rs1, vl);
+}
+
+void test_sf_vc_xvw_se_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_xvw_se_u8mf8(p27_26_overflow, vd, vs2, rs1, vl);
+}
+
+// sf_vc_ivw_se
+
+void test_sf_vc_ivw_se_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_ivw_se_u8mf8' must be a constant integer}}
+ sf_vc_ivw_se_u8mf8(index, vd, vs2, simm5, vl);
+}
+
+void test_sf_vc_ivw_se_u8mf8_simm5_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_ivw_se_u8mf8' must be a constant integer}}
+ sf_vc_ivw_se_u8mf8(p27_26, vd, vs2, index, vl);
+}
+
+void test_sf_vc_ivw_se_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ sf_vc_ivw_se_u8mf8(p27_26_overflow, vd, vs2, simm5, vl);
+}
+
+void test_sf_vc_ivw_se_u8mf8_simm5_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ sf_vc_ivw_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_fvw_se
+
+void test_sf_vc_fvw_se_u16mf4_p26_not_constant(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_fvw_se_u16mf4' must be a constant integer}}
+ sf_vc_fvw_se_u16mf4(index, vd, vs2, fs1, vl);
+}
+
+void test_sf_vc_fvw_se_u16mf4_p26_overflow(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ sf_vc_fvw_se_u16mf4(p26_overflow, vd, vs2, fs1, vl);
+}
+
+// sf_vc_v_vvw_se
+
+vuint16mf4_t test_sf_vc_v_vvw_se_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_vvw_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_vvw_se_u8mf8(index, vd, vs2, vs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_vvw_se_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_vvw_se_u8mf8(p27_26_overflow, vd, vs2, vs1, vl);
+}
+
+// sf_vc_v_vvw
+
+vuint16mf4_t test_sf_vc_v_vvw_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_vvw_u8mf8' must be a constant integer}}
+ return sf_vc_v_vvw_u8mf8(index, vd, vs2, vs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_vvw_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, vuint8mf8_t vs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_vvw_u8mf8(p27_26_overflow, vd, vs2, vs1, vl);
+}
+
+// sf_vc_v_xvw_se
+
+vuint16mf4_t test_sf_vc_v_xvw_se_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_xvw_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_xvw_se_u8mf8(index, vd, vs2, rs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_xvw_se_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_xvw_se_u8mf8(p27_26_overflow, vd, vs2, rs1, vl);
+}
+
+// sf_vc_v_xvw
+
+vuint16mf4_t test_sf_vc_v_xvw_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_xvw_u8mf8' must be a constant integer}}
+ return sf_vc_v_xvw_u8mf8(index, vd, vs2, rs1, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_xvw_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, uint8_t rs1, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_xvw_u8mf8(p27_26_overflow, vd, vs2, rs1, vl);
+}
+
+// sf_vc_v_ivw_se
+
+vuint16mf4_t test_sf_vc_v_ivw_se_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivw_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivw_se_u8mf8(index, vd, vs2, simm5, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_ivw_se_u8mf8_simm5_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivw_se_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivw_se_u8mf8(p27_26, vd, vs2, index, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_ivw_se_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_ivw_se_u8mf8(p27_26_overflow, vd, vs2, simm5, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_ivw_se_u8mf8_simm5_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_ivw_se_u8mf8(p27_26, vd, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_v_ivw
+
+vuint16mf4_t test_sf_vc_v_ivw_u8mf8_p27_26_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivw_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivw_u8mf8(index, vd, vs2, simm5, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_ivw_u8mf8_simm5_not_constant(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_ivw_u8mf8' must be a constant integer}}
+ return sf_vc_v_ivw_u8mf8(p27_26, vd, vs2, index, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_ivw_u8mf8_p27_26_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 4 is outside the valid range [0, 3]}}
+ return sf_vc_v_ivw_u8mf8(p27_26_overflow, vd, vs2, simm5, vl);
+}
+
+vuint16mf4_t test_sf_vc_v_ivw_u8mf8_simm5_overflow(vuint16mf4_t vd, vuint8mf8_t vs2, size_t vl) {
+ // expected-error at +1 {{argument value 16 is outside the valid range [-16, 15]}}
+ return sf_vc_v_ivw_u8mf8(p27_26, vd, vs2, simm5_overflow, vl);
+}
+
+// sf_vc_v_fvw_se
+
+vuint32mf2_t test_sf_vc_v_fvw_se_u16mf4_p26_not_constant(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_fvw_se_u16mf4' must be a constant integer}}
+ return sf_vc_v_fvw_se_u16mf4(index, vd, vs2, fs1, vl);
+}
+
+vuint32mf2_t test_sf_vc_v_fvw_se_u16mf4_p26_overflow(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ return sf_vc_v_fvw_se_u16mf4(p26_overflow, vd, vs2, fs1, vl);
+}
+
+// sf_vc_v_fvw
+
+vuint32mf2_t test_sf_vc_v_fvw_u16mf4_p26_not_constant(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl, int index) {
+ // expected-error at +1 {{argument to 'sf_vc_v_fvw_u16mf4' must be a constant integer}}
+ return sf_vc_v_fvw_u16mf4(index, vd, vs2, fs1, vl);
+}
+
+vuint32mf2_t test_sf_vc_v_fvw_u16mf4_p26_overflow(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
+ // expected-error at +1 {{argument value 2 is outside the valid range [0, 1]}}
+ return sf_vc_v_fvw_u16mf4(p26_overflow, vd, vs2, fs1, vl);
+}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x-rv64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x-rv64.c
index 954008ecc829..b5606b83545b 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x-rv64.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x-rv64.c
@@ -3,9 +3,9 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
-const int p24_20 = 0x1f;
-const int p11_7 = 0x1f;
+#define p27_26 (0b11)
+#define p24_20 (0b11111)
+#define p11_7 (0b11111)
// CHECK-RV64-LABEL: @test_sf_vc_x_se_u64m1(
// CHECK-RV64-NEXT: entry:
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x.c
index d283c8036d38..9dbf44d68a21 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-x.c
@@ -4,10 +4,10 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
-const int p24_20 = 0x1f;
-const int p11_7 = 0x1f;
-const int simm5 = 10;
+#define p27_26 (0b11)
+#define p24_20 (0b11111)
+#define p11_7 (0b11111)
+#define simm5 (10)
// CHECK-RV32-LABEL: @test_sf_vc_x_se_u8mf8(
// CHECK-RV32-NEXT: entry:
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv-rv64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv-rv64.c
index d865d0c0b172..8ef0e986d018 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv-rv64.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv-rv64.c
@@ -4,8 +4,8 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
-const int p11_7 = 0x1f;
+#define p27_26 (0b11)
+#define p11_7 (0b11111)
// CHECK-RV64-LABEL: @test_sf_vc_xv_se_u64m1(
// CHECK-RV64-NEXT: entry:
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv.c
index 56a0f69209df..1deb134d952e 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xv.c
@@ -4,10 +4,10 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
-const int p27 = 1;
-const int p11_7 = 0x1f;
-const int simm5 = 10;
+#define p27_26 (0b11)
+#define p26 (0b1)
+#define p11_7 (0b11111)
+#define simm5 (10)
// CHECK-RV32-LABEL: @test_sf_vc_vv_se_u8mf8(
// CHECK-RV32-NEXT: entry:
@@ -2624,7 +2624,7 @@ vuint64m8_t test_sf_vc_v_iv_u64m8(vuint64m8_t vs2, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u16mf4(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fv_se_u16mf4(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u16mf4(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u16mf2(
@@ -2638,7 +2638,7 @@ void test_sf_vc_fv_se_u16mf4(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u16mf2(vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fv_se_u16mf2(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u16mf2(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u16m1(
@@ -2652,7 +2652,7 @@ void test_sf_vc_fv_se_u16mf2(vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u16m1(vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fv_se_u16m1(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u16m1(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u16m2(
@@ -2666,7 +2666,7 @@ void test_sf_vc_fv_se_u16m1(vuint16m1_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u16m2(vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fv_se_u16m2(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u16m2(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u16m4(
@@ -2680,7 +2680,7 @@ void test_sf_vc_fv_se_u16m2(vuint16m2_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u16m4(vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fv_se_u16m4(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u16m4(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u16m8(
@@ -2694,7 +2694,7 @@ void test_sf_vc_fv_se_u16m4(vuint16m4_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u16m8(vuint16m8_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fv_se_u16m8(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u16m8(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u32mf2(
@@ -2708,7 +2708,7 @@ void test_sf_vc_fv_se_u16m8(vuint16m8_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u32mf2(vuint32mf2_t vs2, float fs1, size_t vl) {
- sf_vc_fv_se_u32mf2(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u32mf2(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u32m1(
@@ -2722,7 +2722,7 @@ void test_sf_vc_fv_se_u32mf2(vuint32mf2_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u32m1(vuint32m1_t vs2, float fs1, size_t vl) {
- sf_vc_fv_se_u32m1(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u32m1(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u32m2(
@@ -2736,7 +2736,7 @@ void test_sf_vc_fv_se_u32m1(vuint32m1_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u32m2(vuint32m2_t vs2, float fs1, size_t vl) {
- sf_vc_fv_se_u32m2(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u32m2(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u32m4(
@@ -2750,7 +2750,7 @@ void test_sf_vc_fv_se_u32m2(vuint32m2_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u32m4(vuint32m4_t vs2, float fs1, size_t vl) {
- sf_vc_fv_se_u32m4(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u32m4(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u32m8(
@@ -2764,7 +2764,7 @@ void test_sf_vc_fv_se_u32m4(vuint32m4_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u32m8(vuint32m8_t vs2, float fs1, size_t vl) {
- sf_vc_fv_se_u32m8(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u32m8(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u64m1(
@@ -2778,7 +2778,7 @@ void test_sf_vc_fv_se_u32m8(vuint32m8_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u64m1(vuint64m1_t vs2, double fs1, size_t vl) {
- sf_vc_fv_se_u64m1(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u64m1(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u64m2(
@@ -2792,7 +2792,7 @@ void test_sf_vc_fv_se_u64m1(vuint64m1_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u64m2(vuint64m2_t vs2, double fs1, size_t vl) {
- sf_vc_fv_se_u64m2(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u64m2(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u64m4(
@@ -2806,7 +2806,7 @@ void test_sf_vc_fv_se_u64m2(vuint64m2_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u64m4(vuint64m4_t vs2, double fs1, size_t vl) {
- sf_vc_fv_se_u64m4(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u64m4(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fv_se_u64m8(
@@ -2820,7 +2820,7 @@ void test_sf_vc_fv_se_u64m4(vuint64m4_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fv_se_u64m8(vuint64m8_t vs2, double fs1, size_t vl) {
- sf_vc_fv_se_u64m8(p27, p11_7, vs2, fs1, vl);
+ sf_vc_fv_se_u64m8(p26, p11_7, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u16mf4(
@@ -2834,7 +2834,7 @@ void test_sf_vc_fv_se_u64m8(vuint64m8_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
//
vuint16mf4_t test_sf_vc_v_fv_se_u16mf4(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_se_u16mf4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u16mf4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u16mf2(
@@ -2848,7 +2848,7 @@ vuint16mf4_t test_sf_vc_v_fv_se_u16mf4(vuint16mf4_t vs2, _Float16 fs1, size_t vl
// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
//
vuint16mf2_t test_sf_vc_v_fv_se_u16mf2(vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_se_u16mf2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u16mf2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u16m1(
@@ -2862,7 +2862,7 @@ vuint16mf2_t test_sf_vc_v_fv_se_u16mf2(vuint16mf2_t vs2, _Float16 fs1, size_t vl
// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
//
vuint16m1_t test_sf_vc_v_fv_se_u16m1(vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_se_u16m1(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u16m1(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u16m2(
@@ -2876,7 +2876,7 @@ vuint16m1_t test_sf_vc_v_fv_se_u16m1(vuint16m1_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
//
vuint16m2_t test_sf_vc_v_fv_se_u16m2(vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_se_u16m2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u16m2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u16m4(
@@ -2890,7 +2890,7 @@ vuint16m2_t test_sf_vc_v_fv_se_u16m2(vuint16m2_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
//
vuint16m4_t test_sf_vc_v_fv_se_u16m4(vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_se_u16m4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u16m4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u16m8(
@@ -2904,7 +2904,7 @@ vuint16m4_t test_sf_vc_v_fv_se_u16m4(vuint16m4_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
//
vuint16m8_t test_sf_vc_v_fv_se_u16m8(vuint16m8_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_se_u16m8(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u16m8(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u32mf2(
@@ -2918,7 +2918,7 @@ vuint16m8_t test_sf_vc_v_fv_se_u16m8(vuint16m8_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
//
vuint32mf2_t test_sf_vc_v_fv_se_u32mf2(vuint32mf2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_se_u32mf2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u32mf2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u32m1(
@@ -2932,7 +2932,7 @@ vuint32mf2_t test_sf_vc_v_fv_se_u32mf2(vuint32mf2_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
//
vuint32m1_t test_sf_vc_v_fv_se_u32m1(vuint32m1_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_se_u32m1(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u32m1(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u32m2(
@@ -2946,7 +2946,7 @@ vuint32m1_t test_sf_vc_v_fv_se_u32m1(vuint32m1_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
//
vuint32m2_t test_sf_vc_v_fv_se_u32m2(vuint32m2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_se_u32m2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u32m2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u32m4(
@@ -2960,7 +2960,7 @@ vuint32m2_t test_sf_vc_v_fv_se_u32m2(vuint32m2_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
//
vuint32m4_t test_sf_vc_v_fv_se_u32m4(vuint32m4_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_se_u32m4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u32m4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u32m8(
@@ -2974,7 +2974,7 @@ vuint32m4_t test_sf_vc_v_fv_se_u32m4(vuint32m4_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
//
vuint32m8_t test_sf_vc_v_fv_se_u32m8(vuint32m8_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_se_u32m8(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u32m8(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u64m1(
@@ -2988,7 +2988,7 @@ vuint32m8_t test_sf_vc_v_fv_se_u32m8(vuint32m8_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
//
vuint64m1_t test_sf_vc_v_fv_se_u64m1(vuint64m1_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_se_u64m1(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u64m1(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u64m2(
@@ -3002,7 +3002,7 @@ vuint64m1_t test_sf_vc_v_fv_se_u64m1(vuint64m1_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
//
vuint64m2_t test_sf_vc_v_fv_se_u64m2(vuint64m2_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_se_u64m2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u64m2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u64m4(
@@ -3016,7 +3016,7 @@ vuint64m2_t test_sf_vc_v_fv_se_u64m2(vuint64m2_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
//
vuint64m4_t test_sf_vc_v_fv_se_u64m4(vuint64m4_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_se_u64m4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u64m4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_se_u64m8(
@@ -3030,7 +3030,7 @@ vuint64m4_t test_sf_vc_v_fv_se_u64m4(vuint64m4_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
//
vuint64m8_t test_sf_vc_v_fv_se_u64m8(vuint64m8_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_se_u64m8(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_se_u64m8(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u16mf4(
@@ -3044,7 +3044,7 @@ vuint64m8_t test_sf_vc_v_fv_se_u64m8(vuint64m8_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
//
vuint16mf4_t test_sf_vc_v_fv_u16mf4(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_u16mf4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u16mf4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u16mf2(
@@ -3058,7 +3058,7 @@ vuint16mf4_t test_sf_vc_v_fv_u16mf4(vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
//
vuint16mf2_t test_sf_vc_v_fv_u16mf2(vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_u16mf2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u16mf2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u16m1(
@@ -3072,7 +3072,7 @@ vuint16mf2_t test_sf_vc_v_fv_u16mf2(vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
//
vuint16m1_t test_sf_vc_v_fv_u16m1(vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_u16m1(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u16m1(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u16m2(
@@ -3086,7 +3086,7 @@ vuint16m1_t test_sf_vc_v_fv_u16m1(vuint16m1_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
//
vuint16m2_t test_sf_vc_v_fv_u16m2(vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_u16m2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u16m2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u16m4(
@@ -3100,7 +3100,7 @@ vuint16m2_t test_sf_vc_v_fv_u16m2(vuint16m2_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
//
vuint16m4_t test_sf_vc_v_fv_u16m4(vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_u16m4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u16m4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u16m8(
@@ -3114,7 +3114,7 @@ vuint16m4_t test_sf_vc_v_fv_u16m4(vuint16m4_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
//
vuint16m8_t test_sf_vc_v_fv_u16m8(vuint16m8_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fv_u16m8(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u16m8(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u32mf2(
@@ -3128,7 +3128,7 @@ vuint16m8_t test_sf_vc_v_fv_u16m8(vuint16m8_t vs2, _Float16 fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
//
vuint32mf2_t test_sf_vc_v_fv_u32mf2(vuint32mf2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_u32mf2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u32mf2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u32m1(
@@ -3142,7 +3142,7 @@ vuint32mf2_t test_sf_vc_v_fv_u32mf2(vuint32mf2_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
//
vuint32m1_t test_sf_vc_v_fv_u32m1(vuint32m1_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_u32m1(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u32m1(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u32m2(
@@ -3156,7 +3156,7 @@ vuint32m1_t test_sf_vc_v_fv_u32m1(vuint32m1_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
//
vuint32m2_t test_sf_vc_v_fv_u32m2(vuint32m2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_u32m2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u32m2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u32m4(
@@ -3170,7 +3170,7 @@ vuint32m2_t test_sf_vc_v_fv_u32m2(vuint32m2_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
//
vuint32m4_t test_sf_vc_v_fv_u32m4(vuint32m4_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_u32m4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u32m4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u32m8(
@@ -3184,7 +3184,7 @@ vuint32m4_t test_sf_vc_v_fv_u32m4(vuint32m4_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
//
vuint32m8_t test_sf_vc_v_fv_u32m8(vuint32m8_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fv_u32m8(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u32m8(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u64m1(
@@ -3198,7 +3198,7 @@ vuint32m8_t test_sf_vc_v_fv_u32m8(vuint32m8_t vs2, float fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
//
vuint64m1_t test_sf_vc_v_fv_u64m1(vuint64m1_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_u64m1(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u64m1(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u64m2(
@@ -3212,7 +3212,7 @@ vuint64m1_t test_sf_vc_v_fv_u64m1(vuint64m1_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
//
vuint64m2_t test_sf_vc_v_fv_u64m2(vuint64m2_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_u64m2(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u64m2(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u64m4(
@@ -3226,7 +3226,7 @@ vuint64m2_t test_sf_vc_v_fv_u64m2(vuint64m2_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
//
vuint64m4_t test_sf_vc_v_fv_u64m4(vuint64m4_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_u64m4(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u64m4(p26, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fv_u64m8(
@@ -3240,5 +3240,5 @@ vuint64m4_t test_sf_vc_v_fv_u64m4(vuint64m4_t vs2, double fs1, size_t vl) {
// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
//
vuint64m8_t test_sf_vc_v_fv_u64m8(vuint64m8_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fv_u64m8(p27, vs2, fs1, vl);
+ return sf_vc_v_fv_u64m8(p26, vs2, fs1, vl);
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv-rv64.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv-rv64.c
index fee251b1b6fd..986797004df9 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv-rv64.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv-rv64.c
@@ -4,7 +4,7 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
+#define p27_26 (0b11)
// CHECK-RV64-LABEL: @test_sf_vc_xvv_se_u64m1(
// CHECK-RV64-NEXT: entry:
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv.c
index d5d95693115e..aaca0a5e578f 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvv.c
@@ -4,9 +4,9 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
-const int p27 = 1;
-const int simm5 = 10;
+#define p27_26 (0b11)
+#define p26 (0b1)
+#define simm5 (10)
// CHECK-RV32-LABEL: @test_sf_vc_vvv_se_u8mf8(
// CHECK-RV32-NEXT: entry:
@@ -2623,7 +2623,7 @@ vuint64m8_t test_sf_vc_v_ivv_u64m8(vuint64m8_t vd, vuint64m8_t vs2, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvv_se_u16mf4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u16mf4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u16mf2(
@@ -2637,7 +2637,7 @@ void test_sf_vc_fvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, s
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvv_se_u16mf2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u16mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u16m1(
@@ -2651,7 +2651,7 @@ void test_sf_vc_fvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, s
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvv_se_u16m1(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u16m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u16m2(
@@ -2665,7 +2665,7 @@ void test_sf_vc_fvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvv_se_u16m2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u16m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u16m4(
@@ -2679,7 +2679,7 @@ void test_sf_vc_fvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvv_se_u16m4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u16m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u16m8(
@@ -2693,7 +2693,7 @@ void test_sf_vc_fvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvv_se_u16m8(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u16m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u32mf2(
@@ -2707,7 +2707,7 @@ void test_sf_vc_fvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size_t vl) {
- sf_vc_fvv_se_u32mf2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u32mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u32m1(
@@ -2721,7 +2721,7 @@ void test_sf_vc_fvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t vl) {
- sf_vc_fvv_se_u32m1(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u32m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u32m2(
@@ -2735,7 +2735,7 @@ void test_sf_vc_fvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t vl) {
- sf_vc_fvv_se_u32m2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u32m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u32m4(
@@ -2749,7 +2749,7 @@ void test_sf_vc_fvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t vl) {
- sf_vc_fvv_se_u32m4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u32m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u32m8(
@@ -2763,7 +2763,7 @@ void test_sf_vc_fvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t vl) {
- sf_vc_fvv_se_u32m8(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u32m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u64m1(
@@ -2777,7 +2777,7 @@ void test_sf_vc_fvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t vl) {
- sf_vc_fvv_se_u64m1(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u64m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u64m2(
@@ -2791,7 +2791,7 @@ void test_sf_vc_fvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t vl) {
- sf_vc_fvv_se_u64m2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u64m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u64m4(
@@ -2805,7 +2805,7 @@ void test_sf_vc_fvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t vl) {
- sf_vc_fvv_se_u64m4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u64m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvv_se_u64m8(
@@ -2819,7 +2819,7 @@ void test_sf_vc_fvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t vl) {
- sf_vc_fvv_se_u64m8(p27, vd, vs2, fs1, vl);
+ sf_vc_fvv_se_u64m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u16mf4(
@@ -2833,7 +2833,7 @@ void test_sf_vc_fvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t
// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
//
vuint16mf4_t test_sf_vc_v_fvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_se_u16mf4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u16mf4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u16mf2(
@@ -2847,7 +2847,7 @@ vuint16mf4_t test_sf_vc_v_fvv_se_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Floa
// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
//
vuint16mf2_t test_sf_vc_v_fvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_se_u16mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u16mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u16m1(
@@ -2861,7 +2861,7 @@ vuint16mf2_t test_sf_vc_v_fvv_se_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Floa
// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
//
vuint16m1_t test_sf_vc_v_fvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_se_u16m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u16m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u16m2(
@@ -2875,7 +2875,7 @@ vuint16m1_t test_sf_vc_v_fvv_se_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
//
vuint16m2_t test_sf_vc_v_fvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_se_u16m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u16m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u16m4(
@@ -2889,7 +2889,7 @@ vuint16m2_t test_sf_vc_v_fvv_se_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
//
vuint16m4_t test_sf_vc_v_fvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_se_u16m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u16m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u16m8(
@@ -2903,7 +2903,7 @@ vuint16m4_t test_sf_vc_v_fvv_se_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
//
vuint16m8_t test_sf_vc_v_fvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_se_u16m8(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u16m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u32mf2(
@@ -2917,7 +2917,7 @@ vuint16m8_t test_sf_vc_v_fvv_se_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
//
vuint32mf2_t test_sf_vc_v_fvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_se_u32mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u32mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u32m1(
@@ -2931,7 +2931,7 @@ vuint32mf2_t test_sf_vc_v_fvv_se_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float
// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
//
vuint32m1_t test_sf_vc_v_fvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_se_u32m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u32m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u32m2(
@@ -2945,7 +2945,7 @@ vuint32m1_t test_sf_vc_v_fvv_se_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
//
vuint32m2_t test_sf_vc_v_fvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_se_u32m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u32m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u32m4(
@@ -2959,7 +2959,7 @@ vuint32m2_t test_sf_vc_v_fvv_se_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
//
vuint32m4_t test_sf_vc_v_fvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_se_u32m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u32m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u32m8(
@@ -2973,7 +2973,7 @@ vuint32m4_t test_sf_vc_v_fvv_se_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
//
vuint32m8_t test_sf_vc_v_fvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_se_u32m8(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u32m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u64m1(
@@ -2987,7 +2987,7 @@ vuint32m8_t test_sf_vc_v_fvv_se_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
//
vuint64m1_t test_sf_vc_v_fvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_se_u64m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u64m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u64m2(
@@ -3001,7 +3001,7 @@ vuint64m1_t test_sf_vc_v_fvv_se_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs
// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
//
vuint64m2_t test_sf_vc_v_fvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_se_u64m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u64m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u64m4(
@@ -3015,7 +3015,7 @@ vuint64m2_t test_sf_vc_v_fvv_se_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs
// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
//
vuint64m4_t test_sf_vc_v_fvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_se_u64m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u64m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_se_u64m8(
@@ -3029,7 +3029,7 @@ vuint64m4_t test_sf_vc_v_fvv_se_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs
// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
//
vuint64m8_t test_sf_vc_v_fvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_se_u64m8(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_se_u64m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u16mf4(
@@ -3043,7 +3043,7 @@ vuint64m8_t test_sf_vc_v_fvv_se_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs
// CHECK-RV64-NEXT: ret <vscale x 1 x i16> [[TMP0]]
//
vuint16mf4_t test_sf_vc_v_fvv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_u16mf4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u16mf4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u16mf2(
@@ -3057,7 +3057,7 @@ vuint16mf4_t test_sf_vc_v_fvv_u16mf4(vuint16mf4_t vd, vuint16mf4_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 2 x i16> [[TMP0]]
//
vuint16mf2_t test_sf_vc_v_fvv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_u16mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u16mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u16m1(
@@ -3071,7 +3071,7 @@ vuint16mf2_t test_sf_vc_v_fvv_u16mf2(vuint16mf2_t vd, vuint16mf2_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 4 x i16> [[TMP0]]
//
vuint16m1_t test_sf_vc_v_fvv_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_u16m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u16m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u16m2(
@@ -3085,7 +3085,7 @@ vuint16m1_t test_sf_vc_v_fvv_u16m1(vuint16m1_t vd, vuint16m1_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 8 x i16> [[TMP0]]
//
vuint16m2_t test_sf_vc_v_fvv_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_u16m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u16m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u16m4(
@@ -3099,7 +3099,7 @@ vuint16m2_t test_sf_vc_v_fvv_u16m2(vuint16m2_t vd, vuint16m2_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 16 x i16> [[TMP0]]
//
vuint16m4_t test_sf_vc_v_fvv_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_u16m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u16m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u16m8(
@@ -3113,7 +3113,7 @@ vuint16m4_t test_sf_vc_v_fvv_u16m4(vuint16m4_t vd, vuint16m4_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 32 x i16> [[TMP0]]
//
vuint16m8_t test_sf_vc_v_fvv_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvv_u16m8(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u16m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u32mf2(
@@ -3127,7 +3127,7 @@ vuint16m8_t test_sf_vc_v_fvv_u16m8(vuint16m8_t vd, vuint16m8_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
//
vuint32mf2_t test_sf_vc_v_fvv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_u32mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u32mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u32m1(
@@ -3141,7 +3141,7 @@ vuint32mf2_t test_sf_vc_v_fvv_u32mf2(vuint32mf2_t vd, vuint32mf2_t vs2, float fs
// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
//
vuint32m1_t test_sf_vc_v_fvv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_u32m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u32m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u32m2(
@@ -3155,7 +3155,7 @@ vuint32m1_t test_sf_vc_v_fvv_u32m1(vuint32m1_t vd, vuint32m1_t vs2, float fs1, s
// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
//
vuint32m2_t test_sf_vc_v_fvv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_u32m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u32m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u32m4(
@@ -3169,7 +3169,7 @@ vuint32m2_t test_sf_vc_v_fvv_u32m2(vuint32m2_t vd, vuint32m2_t vs2, float fs1, s
// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
//
vuint32m4_t test_sf_vc_v_fvv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_u32m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u32m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u32m8(
@@ -3183,7 +3183,7 @@ vuint32m4_t test_sf_vc_v_fvv_u32m4(vuint32m4_t vd, vuint32m4_t vs2, float fs1, s
// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
//
vuint32m8_t test_sf_vc_v_fvv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvv_u32m8(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u32m8(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u64m1(
@@ -3197,7 +3197,7 @@ vuint32m8_t test_sf_vc_v_fvv_u32m8(vuint32m8_t vd, vuint32m8_t vs2, float fs1, s
// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
//
vuint64m1_t test_sf_vc_v_fvv_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_u64m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u64m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u64m2(
@@ -3211,7 +3211,7 @@ vuint64m1_t test_sf_vc_v_fvv_u64m1(vuint64m1_t vd, vuint64m1_t vs2, double fs1,
// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
//
vuint64m2_t test_sf_vc_v_fvv_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_u64m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u64m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u64m4(
@@ -3225,7 +3225,7 @@ vuint64m2_t test_sf_vc_v_fvv_u64m2(vuint64m2_t vd, vuint64m2_t vs2, double fs1,
// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
//
vuint64m4_t test_sf_vc_v_fvv_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_u64m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u64m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvv_u64m8(
@@ -3239,5 +3239,5 @@ vuint64m4_t test_sf_vc_v_fvv_u64m4(vuint64m4_t vd, vuint64m4_t vs2, double fs1,
// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
//
vuint64m8_t test_sf_vc_v_fvv_u64m8(vuint64m8_t vd, vuint64m8_t vs2, double fs1, size_t vl) {
- return sf_vc_v_fvv_u64m8(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvv_u64m8(p26, vd, vs2, fs1, vl);
}
diff --git a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvw.c b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvw.c
index 4688cc083ba4..d9c0a133109c 100644
--- a/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvw.c
+++ b/clang/test/CodeGen/RISCV/rvv-intrinsics/xsfvcp-xvw.c
@@ -4,9 +4,9 @@
#include <riscv_vector.h>
-const int p27_26 = 3;
-const int p27 = 1;
-const int simm5 = 10;
+#define p27_26 (0b11)
+#define p26 (0b1)
+#define simm5 (10)
// CHECK-RV32-LABEL: @test_sf_vc_vvw_se_u8mf8(
// CHECK-RV32-NEXT: entry:
@@ -1909,7 +1909,7 @@ vuint64m8_t test_sf_vc_v_ivw_u32m4(vuint64m8_t vd, vuint32m4_t vs2, size_t vl) {
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u16mf4(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvw_se_u16mf4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u16mf4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u16mf2(
@@ -1923,7 +1923,7 @@ void test_sf_vc_fvw_se_u16mf4(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, s
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u16mf2(vuint32m1_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvw_se_u16mf2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u16mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u16m1(
@@ -1937,7 +1937,7 @@ void test_sf_vc_fvw_se_u16mf2(vuint32m1_t vd, vuint16mf2_t vs2, _Float16 fs1, si
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u16m1(vuint32m2_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvw_se_u16m1(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u16m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u16m2(
@@ -1951,7 +1951,7 @@ void test_sf_vc_fvw_se_u16m1(vuint32m2_t vd, vuint16m1_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u16m2(vuint32m4_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvw_se_u16m2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u16m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u16m4(
@@ -1965,7 +1965,7 @@ void test_sf_vc_fvw_se_u16m2(vuint32m4_t vd, vuint16m2_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u16m4(vuint32m8_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- sf_vc_fvw_se_u16m4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u16m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u32mf2(
@@ -1979,7 +1979,7 @@ void test_sf_vc_fvw_se_u16m4(vuint32m8_t vd, vuint16m4_t vs2, _Float16 fs1, size
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u32mf2(vuint64m1_t vd, vuint32mf2_t vs2, float fs1, size_t vl) {
- sf_vc_fvw_se_u32mf2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u32mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u32m1(
@@ -1993,7 +1993,7 @@ void test_sf_vc_fvw_se_u32mf2(vuint64m1_t vd, vuint32mf2_t vs2, float fs1, size_
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u32m1(vuint64m2_t vd, vuint32m1_t vs2, float fs1, size_t vl) {
- sf_vc_fvw_se_u32m1(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u32m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u32m2(
@@ -2007,7 +2007,7 @@ void test_sf_vc_fvw_se_u32m1(vuint64m2_t vd, vuint32m1_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u32m2(vuint64m4_t vd, vuint32m2_t vs2, float fs1, size_t vl) {
- sf_vc_fvw_se_u32m2(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u32m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_fvw_se_u32m4(
@@ -2021,7 +2021,7 @@ void test_sf_vc_fvw_se_u32m2(vuint64m4_t vd, vuint32m2_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret void
//
void test_sf_vc_fvw_se_u32m4(vuint64m8_t vd, vuint32m4_t vs2, float fs1, size_t vl) {
- sf_vc_fvw_se_u32m4(p27, vd, vs2, fs1, vl);
+ sf_vc_fvw_se_u32m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u16mf4(
@@ -2035,7 +2035,7 @@ void test_sf_vc_fvw_se_u32m4(vuint64m8_t vd, vuint32m4_t vs2, float fs1, size_t
// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
//
vuint32mf2_t test_sf_vc_v_fvw_se_u16mf4(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_se_u16mf4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u16mf4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u16mf2(
@@ -2049,7 +2049,7 @@ vuint32mf2_t test_sf_vc_v_fvw_se_u16mf4(vuint32mf2_t vd, vuint16mf4_t vs2, _Floa
// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
//
vuint32m1_t test_sf_vc_v_fvw_se_u16mf2(vuint32m1_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_se_u16mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u16mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u16m1(
@@ -2063,7 +2063,7 @@ vuint32m1_t test_sf_vc_v_fvw_se_u16mf2(vuint32m1_t vd, vuint16mf2_t vs2, _Float1
// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
//
vuint32m2_t test_sf_vc_v_fvw_se_u16m1(vuint32m2_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_se_u16m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u16m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u16m2(
@@ -2077,7 +2077,7 @@ vuint32m2_t test_sf_vc_v_fvw_se_u16m1(vuint32m2_t vd, vuint16m1_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
//
vuint32m4_t test_sf_vc_v_fvw_se_u16m2(vuint32m4_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_se_u16m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u16m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u16m4(
@@ -2091,7 +2091,7 @@ vuint32m4_t test_sf_vc_v_fvw_se_u16m2(vuint32m4_t vd, vuint16m2_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
//
vuint32m8_t test_sf_vc_v_fvw_se_u16m4(vuint32m8_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_se_u16m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u16m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u32mf2(
@@ -2105,7 +2105,7 @@ vuint32m8_t test_sf_vc_v_fvw_se_u16m4(vuint32m8_t vd, vuint16m4_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
//
vuint64m1_t test_sf_vc_v_fvw_se_u32mf2(vuint64m1_t vd, vuint32mf2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_se_u32mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u32mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u32m1(
@@ -2119,7 +2119,7 @@ vuint64m1_t test_sf_vc_v_fvw_se_u32mf2(vuint64m1_t vd, vuint32mf2_t vs2, float f
// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
//
vuint64m2_t test_sf_vc_v_fvw_se_u32m1(vuint64m2_t vd, vuint32m1_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_se_u32m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u32m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u32m2(
@@ -2133,7 +2133,7 @@ vuint64m2_t test_sf_vc_v_fvw_se_u32m1(vuint64m2_t vd, vuint32m1_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
//
vuint64m4_t test_sf_vc_v_fvw_se_u32m2(vuint64m4_t vd, vuint32m2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_se_u32m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u32m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_se_u32m4(
@@ -2147,7 +2147,7 @@ vuint64m4_t test_sf_vc_v_fvw_se_u32m2(vuint64m4_t vd, vuint32m2_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
//
vuint64m8_t test_sf_vc_v_fvw_se_u32m4(vuint64m8_t vd, vuint32m4_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_se_u32m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_se_u32m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u16mf4(
@@ -2161,7 +2161,7 @@ vuint64m8_t test_sf_vc_v_fvw_se_u32m4(vuint64m8_t vd, vuint32m4_t vs2, float fs1
// CHECK-RV64-NEXT: ret <vscale x 1 x i32> [[TMP0]]
//
vuint32mf2_t test_sf_vc_v_fvw_u16mf4(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_u16mf4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u16mf4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u16mf2(
@@ -2175,7 +2175,7 @@ vuint32mf2_t test_sf_vc_v_fvw_u16mf4(vuint32mf2_t vd, vuint16mf4_t vs2, _Float16
// CHECK-RV64-NEXT: ret <vscale x 2 x i32> [[TMP0]]
//
vuint32m1_t test_sf_vc_v_fvw_u16mf2(vuint32m1_t vd, vuint16mf2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_u16mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u16mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u16m1(
@@ -2189,7 +2189,7 @@ vuint32m1_t test_sf_vc_v_fvw_u16mf2(vuint32m1_t vd, vuint16mf2_t vs2, _Float16 f
// CHECK-RV64-NEXT: ret <vscale x 4 x i32> [[TMP0]]
//
vuint32m2_t test_sf_vc_v_fvw_u16m1(vuint32m2_t vd, vuint16m1_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_u16m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u16m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u16m2(
@@ -2203,7 +2203,7 @@ vuint32m2_t test_sf_vc_v_fvw_u16m1(vuint32m2_t vd, vuint16m1_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 8 x i32> [[TMP0]]
//
vuint32m4_t test_sf_vc_v_fvw_u16m2(vuint32m4_t vd, vuint16m2_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_u16m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u16m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u16m4(
@@ -2217,7 +2217,7 @@ vuint32m4_t test_sf_vc_v_fvw_u16m2(vuint32m4_t vd, vuint16m2_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 16 x i32> [[TMP0]]
//
vuint32m8_t test_sf_vc_v_fvw_u16m4(vuint32m8_t vd, vuint16m4_t vs2, _Float16 fs1, size_t vl) {
- return sf_vc_v_fvw_u16m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u16m4(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u32mf2(
@@ -2231,7 +2231,7 @@ vuint32m8_t test_sf_vc_v_fvw_u16m4(vuint32m8_t vd, vuint16m4_t vs2, _Float16 fs1
// CHECK-RV64-NEXT: ret <vscale x 1 x i64> [[TMP0]]
//
vuint64m1_t test_sf_vc_v_fvw_u32mf2(vuint64m1_t vd, vuint32mf2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_u32mf2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u32mf2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u32m1(
@@ -2245,7 +2245,7 @@ vuint64m1_t test_sf_vc_v_fvw_u32mf2(vuint64m1_t vd, vuint32mf2_t vs2, float fs1,
// CHECK-RV64-NEXT: ret <vscale x 2 x i64> [[TMP0]]
//
vuint64m2_t test_sf_vc_v_fvw_u32m1(vuint64m2_t vd, vuint32m1_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_u32m1(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u32m1(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u32m2(
@@ -2259,7 +2259,7 @@ vuint64m2_t test_sf_vc_v_fvw_u32m1(vuint64m2_t vd, vuint32m1_t vs2, float fs1, s
// CHECK-RV64-NEXT: ret <vscale x 4 x i64> [[TMP0]]
//
vuint64m4_t test_sf_vc_v_fvw_u32m2(vuint64m4_t vd, vuint32m2_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_u32m2(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u32m2(p26, vd, vs2, fs1, vl);
}
// CHECK-RV32-LABEL: @test_sf_vc_v_fvw_u32m4(
@@ -2273,5 +2273,5 @@ vuint64m4_t test_sf_vc_v_fvw_u32m2(vuint64m4_t vd, vuint32m2_t vs2, float fs1, s
// CHECK-RV64-NEXT: ret <vscale x 8 x i64> [[TMP0]]
//
vuint64m8_t test_sf_vc_v_fvw_u32m4(vuint64m8_t vd, vuint32m4_t vs2, float fs1, size_t vl) {
- return sf_vc_v_fvw_u32m4(p27, vd, vs2, fs1, vl);
+ return sf_vc_v_fvw_u32m4(p26, vd, vs2, fs1, vl);
}
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